Figure 1-2 PCI/PCI-X/PCIe I/O Subsystem Block Diagram
| | USBUSB | USB | USB Unified Core IO Board |
Single - Rope | | | 32 bit | | PCI-33 |
ZX1 PCI Bridge | | |
DMD | USB | | |
I2C | | | |
DMD | BMC | IPMB | | |
Bridge | LPC | | SP | Video |
| |
PDH | | TPM | | | VGA |
ROM | | | |
| | MP LAN |
| RTC | UART | | | |
| | | | |
| | COM | | COM | |
| SRAM | | | | |
| | Common Display Panel board | DVD |
| | | | Public PHP I/O Slots |
Single - Rope | DHPC | | PCIx-66 |
ZX1 PCI-X Bridge | | |
Single - Rope | ZX1 PCI-X Bridge | | | PCIx-133 |
| | | | |
Dual - Rope | ZX1 PCI-X Bridge | | | PCIx-133 |
| | |
| | | | |
| Quad - Rope | ZX2 PCI-E Bridge | | X8 PCI-E |
| | |
| | | |
| Quad - Rope | ZX2 PCI-E Bridge | | X8 PCI-E |
| | |
| | | X8 PCI-E |
| Dual - Rope | | Express |
| ZX2 PCI-E Bridge | DISK |
| Switch |
| |
| | | Core Disk Storage |
| | | |
| Single - Rope | ZX1 PCI-X Bridge | PCIx-66 | Private Slots |
| | |
| | | | Core LAN |
Common IO Board
BK PLN
LAN LAN
Ports From Chassis Rear
Ports From Chassis Front
PCI/PCI-X IOBP
On the 10 slot PCI/PCI-X IOBP there are a total 8 Public slots (PCI-X mode1/2), 2 Private Fast-core slots (PCI-X mode1), and 1 Private Slow-core UCIO slot (PCI 32-bit/33-MHz). The eight Public slots are further subdivided into three speed/bandwidth configurations:
•Four PDHP (Public Dual Hot-plug), which operate at 64-bit/66-MHz PCI-X
•Two PSHP-SDR (Public Single Hot-plug - Single Data Rate), operating at 64-bit/133-MHz PCI-X
•Two PSHP-DDR (Public Single Hot-plug - Double Data Rate), at 64-bit/266-MHz (133-MHz double clocked) PCI-X mode2
Four 66-MHz PCI/PCI-X slots are shared in groups of two. Shared slots have many speed and mode change restrictions during hot-plug add or remove operations. For more information on PCI/PCI-X card configuration and restrictions, see “PCI/PCI-X/PCIe Configurations” (page 62).
Four of the server PCI/PCI-X slots are not shared. Two of the nonshared slots are 133 MHz PCI/PCI-X, and two of the slots are 266-MHz PCI/PCI-X. Shared slots have many speed and mode change restrictions during hot-plug add or remove operations.
Table 1-1 PCI/PCI-X I/O Rope Groups
Slot # | Rope Numbers | PCI Bus | Bits | Speed | Function | Hot Swap / |
| | | | | | OL* |
| | | | | | |
1, 2 | 8 | 1 | 64 | 66 MHz | Core I/O (Private) | N |
| | | | | | |
3 | 12, 13, 14, 15 | 2 | 64 | 266 MHz | PCI-X 2.0, DDR (Public) | Y |
| (Quad | | | | | |
| Bandwidth) | | | | | |
| | | | | | |
4 | 4, 5, 6, 7 (Quad | 3 | 64 | 266 MHz | PCI-X 2.0, DDR (Public) | Y |
| Bandwidth) | | | | | |
| | | | | | |
5 | 10, 11 (Dual | 4 | 64 | 133 MHz | High-Speed PCI-X (Public) | Y |
| Bandwidth) | | | | | |
| | | | | | |
