Booting

Table 5-31displays the normal boot process, as reflected in changes to front panel LED states.

Table 5-31 Normal Boot Process LED States

Step

System

Internal

External

Power

Diagnostic

System Power State

 

Health

Health

Health

 

Panel

 

 

 

 

 

 

 

 

1

Off

Off

Off

Off

Off

No ac power to the system.

 

 

 

 

 

 

 

2

Off

Off

Off

Steady

Off

System is shut down, but ac

 

 

 

 

amber

 

power and standby power are

 

 

 

 

 

 

active.

 

 

 

 

 

 

 

3

Off

Off

Off

Steady

Off

System power rails are on when

 

 

 

 

green

 

power switch is toggled.

 

 

 

 

 

 

 

4

Off

Off

Steady green

Steady

Off

System power rails are on; BMC

 

 

 

 

green

 

drives External Health LED.

 

 

 

 

 

 

 

5

Off

Steady

Steady green

Steady

Off

System is booting firmware

 

 

green

 

green

 

(has passed BOOT_START in

 

 

 

 

 

 

firmware).

 

 

 

 

 

 

 

6

Steady

Steady

Steady green

Steady

Off

System has finished booting

 

green

green

 

green

 

firmware and an OS is either

 

 

 

 

 

 

booting or running.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTE: In the normal boot process even though the BMC is running while the system is shut down (Power LED is steady amber), it does not drive the External Health LED to steady green until +12VDC power from the bulk power supplies is applied.

The following steps describe the system boot process. Step numbers provided correspond to the steps in Table 5-31:

3)System power switch turns on bulk power supplies and fans, and releases RESET on all CPUs simultaneously, when toggled on.

5)Initial CPU firmware code fetch is PAL code from EEPROM in PDH, retrieved 4 bytes at a time by DMDC in Zx2 (No shared memory or I/O devices are available at this time; they are not initially configured).

5)Firmware code stack is initially in BBRAM in PDH, retrieved 4 byes at a time, through PDH and DMD buses.

5) PAL code configures all CPUs.

5)SAL code configures all platform CEC chips, including shared memory and all responding I/O devices.

5)Firmware code and stack are relocated to shared memory after all x4DIMM ranks in shared memory are configured and tested.

5)EFI Shell launches from shared memory, and cache lines are retrieved 128 bytes at a time by MEMC in Zx2.

6)The OS loader launches using the EFI device driver.

6) The OS boots and starts its own device drivers.

6)The OS can use runtime PAL and SAL calls, and ACPI features. These abstraction layers enable platform independence.

Booting 173