Figure 1-6 Power Subsystem Block Diagram

System POL Converters

Fan contlr

12/5/06POL

Processor BP

 

CPU PODS

 

 

Fan contlr

 

 

 

V12

POL

 

V12

(2)

 

 

 

 

 

V1P 2

 

 

 

 

V12

POLSummit

 

 

 

 

 

LoopSummit

 

 

 

 

 

 

 

Mem Ext

(2)

 

 

V1P 5

 

 

 

 

V12

POL

12/24 DIMM

 

 

 

 

Summit

V1P 2

 

 

 

Loop

 

 

 

 

 

V12

POL

 

 

 

 

 

Summit

 

 

 

V1P 8

 

Loop

 

 

 

 

 

 

 

V12

POL

 

V1P 8

 

 

 

Summit

 

 

 

 

Loop

 

 

 

 

 

V12

POL

 

 

 

 

 

Summit

 

 

 

 

 

Loop

 

 

 

V2P 5

 

 

 

 

V12

POL

V3P 3_STBY

V0P 9

 

 

 

Summit

 

 

 

 

embedded

 

 

 

Loop

 

 

 

 

 

V2P5

 

 

 

 

 

12/24 DIMM

 

 

B Y

 

 

 

V12

3 S T

 

 

 

 

 

 

V3P 3_STBY

 

 

V3P

 

 

 

 

 

Possibly share Source and Load

 

 

BPS

 

Processor Side

(2)

 

 

 

 

 

I/O BP

 

PDH

 

 

 

V1P 2

 

V2P 5

 

Unified Core

V12

POL

 

POL

 

 

Summit

 

 

 

V3P3 is called

 

Loop

 

V12

 

 

 

 

 

 

V1P 5

 

Summit

V3P3_PCI

 

 

 

Loop

 

 

 

 

 

V12

POL Summit

 

V1P 0

 

 

 

 

 

 

 

Loop

 

POL

 

V1P 2_FPGA

 

 

 

 

 

 

V12

 

embedded

 

 

 

 

 

 

V5P 0

 

Tower of Power

 

 

 

 

 

 

 

V12

POL

 

 

V5P0

V2P 5_FPGA

 

 

 

 

 

 

V3P 3

 

embedded

 

 

 

V3P3

 

V3P 3_STBY

 

V12

POL

 

 

 

V1P 8_SYS _PLL

 

V12N

 

 

 

 

 

 

 

embedded

V12

POL

 

 

 

 

 

 

 

 

 

V1P 8_RMP 3

Mid-Plane

 

 

V3P 3_STBY

embedded

Interconnect

 

 

 

 

 

Embedded design

V3P 3_STBY

 

 

CCA

 

 

 

 

FPD CCA

 

 

V3P3

 

 

V12

V3P3

 

 

 

V3P3

 

 

 

 

 

 

V3P 3_STBY

V5P 0

 

V3P 3_STBY

 

Socha, Jim

SAS CCA

CIOBP

– Target CCA

 

POL

V12

 

 

 

 

 

 

V3P3

 

 

 

 

 

 

V5P0

I/O Side

V12

Two hot-swappable ac/dc power supplies generate main system power, and a standby power voltage. One active power supply is sufficient to operate the system at maximum load. Each power supply receives ac power through the integrated ac inlet. The system can operate at 100-240 VAC and achieve 1+1 redundancy. The power supplies are power factor corrected and the maximum dc power output of the power system is 1095 watts. Service the hot-swappable power supplies are serviced by sliding them out the rear of the chassis.

Applying system power in normal customer usage, the rx3600 runs on 100 to 240 V. Standby power will be supplied on either; hence the BMC will power up when the power supplies are plugged in. The BPS0_AC_OK and BPS1_AC_OK signals indicate whether the ac voltage to the power supplies is within the required range. If neither BPS0_AC_OK nor BPS1_AC_OK is asserted, then the BMC should log an event and prevent the system from turning on.

Power Button The power button on the rx3600 is a momentary contact push button. The BMC polls the front panel power button at a rate of at least 2 Hz. The power button is an input to the System Power State Management. If the system is off, a single button press will turn on the system. If the system has booted to an OS, and a short button press is detected, a graceful-shutdown request will be sent to the system by pulsing ACPI_PWR_BTN_L; when the ACPI bits are set to note the O/S has shut down, the BMC will perform a hard power down. If the system has not booted to an OS, or if a long (5 second) button press is detected, the system will do an immediate hard power off.

System Power State Management The system power may be controlled from the power button, an IPMI Chassis command, Wake-On-LAN, loss or gain of ac.

Power On Sequence:

1.Update the cache of DIMM SPD information.

2.Ensure that the memory board is detected and that the cpu board has a processor in socket 0. If these FRUs are not detected the BMC logs an event against the Missing Device sensor (sensor 0x15).

3.Check for a BPS0_AC_OK or a BPS1_AC_OK signal. If neither is asserted, then the ac supply has a problem.

4.If any FRUs are missing or both ac supplies are not valid, then return to power off state.

Server Subsystems 33