HC08 Full Chip Simulation
Configuration Procedure
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Microcontrollers Debugger Manual
Figure 11.50 SPI OUT Buffer Display

SPFREQ Command

The SPFREQ command lets the user set the frequency of the SPI slave input clock. If the
SPI is configured for the slave mode, this command allows the user to enter the number of
cycles <n> per one input clock period. If no value is given, a window appears and the user
is prompted for a value. If this command is not used, then the clocking is assumed to be set
by the SPI control register.
Syntax
>SPFREQ [<n>]
Where:
<n> The number of cycles for the period of the input clock.
Example
>SPFREQ 8
Set the period of the input slave clock to 8 cycles (total shift = 8*8 cycles per bit =
64 cycles)

FCSTimer Interface Module

In FCS Mode, this module simulates all functionality of the Timer Interface module,
including:
Input capture/output compare
Pulse width modulation
Internal or external clock input
Free running or modulo up count operation