Freescale Semiconductor Microcontrollers Multi-Master Inter-Integrated Circuit

HC08 Full Chip Simulation
Configuration Procedure
272 Microcontrollers Debugger Manual
Example
>INPUTS
Show I/O port input values.
Multi-Master Inter-Integrated Circuit
Module
In Full Chip Simulation Mode, this module simulates all functionality of the Multi-Master
Inter-Integrated Circuit (MMIIC) module including:
• Flag polling
• Interrupt enabled mode
• Transmission and reception of external data
• Master and slave modes of operation
• START and STOP signal generation detection
• Acknowledge bit generation detection
The FCS mode uses the buffered input/output structure to simulate MMIIC inputs. The
user can queue up to 256 data bytes into the input buffer. The output buffer of the USB
module can also hold 256 output bytes. To queue the MMIIC Input Packets, use the
IICDI <...> command in the command prompt. If the MMIIC packet parameters are
properly defined, the packet is placed into the next slot in the input buffer. Otherwise, if no
parameters are provided, an MMIIC Input Buffer window is displayed. Different MMIIC
packet parameters can be entered while the window is open including START, STOP,
ACK, NACK and data bytes. An arrow points to the next byte to be used next as input to
the MMIIC. The data from the MMIIC input buffer is written to the MMIIC module
registers once the MMIIC module is turned on and properly configured for receiving data
from an external MMIIC device. Once the simulation of the data transmission is over, the
arrow moves to the next value in the MMIIC Input Buffer.
Figure 11.23 IIC Input Buffer Display