ColdFire V1 Full Chip Simulation Connection
FCS Visualization Utilities
601
Microcontrollers Debugger Manual
Figure 28.21 Internal Converter Module Organization and Coupler Connections
The fourth unit shows the value of the initial analog signal and value of the DAC output
analog signal.
This component communicates with the mainframe through three parallel ports of eight
bits:
• A port with 1 significant bit to indicate the conversion state.
• An input port to recover the ADC values
• An output port to send values to the DAC in order to visualize them
Signal Generator
The signal generator only generates a sinus signal. The generator output connects to the
ADC visualization screen.
Visualization Screen
The visualization screen is a 200-point horizontal resolution screen. The sinus signal
period deploys in red by default, shown in the upper part of the screen in Figure 28.20, and
the signal generated by the DAC appears in blue in the lower part.
ADC
The ADC is an 8-bit resolution converter generating unsigned values. Figure 28.21 shows
that its entry is directly connected to the signal generator. The conversion order is given by
a timer that is not connected to the data bus, therefore it cannot be set by software.
At the end of a conversion, the ADC sets the state bit. This bit automatically resets after
read.