HCS08 Full Chip Simulation
Peripheral Modules Commands
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Microcontrollers Debugger Manual
Figure 18.11 Frequency Display
Once the ICG is properly configured, the user can monitor the status of the PLL by polling
the corresponding flag. If PLL interrupt is enabled, FCS jumps to an appropriate
subroutine, as long as the interrupt vector is properly defined. To observe the flag going up
as a result of the corresponding CPU event, situate your Memory Window on the memory
location of the ICG Status and Control register.
Figure 18.12 Memory Window
For more information on how to properly configure Clock Generation, refer to the
Freescale reference manual for your microprocessor.
Clock Generation Module Commands
The following commands are available for the M68HCS08 Clock Generation Module.
XTAL Command
Use the XTAL command to change the value of the simulated external oscillator. This in
turn affects the input to the PLL/DCO, and therefore the bus frequency. The P&E
simulator is a cycle-based simulator, so changing the XTAL value does not affect the