HC08 Full Chip Simulation
Configuration Procedure
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Microcontrollers Debugger Manual
interrupts are enabled, the FCS jumps to an appropriate subroutine as long as the SPI
channel interrupt vectors are properly defined.
To simulate the frequency of the SPI slave input clock, use the SPFREQ <n> command.
If the SPI is configured for slave mode, this command allows the user to enter the number
of cycles <n> in the period of the input clock. If the SPFREQ command is not used, then
clocking is set by the SPI control register.
For more information on how to configure the SPI module for desired operation, refer to
the Freescale manual for your microprocessor.

FCSSPI Commands

The following FCSSPI commands are available for use with the M68HC08 processor.

SPCLR Command

Use the SPCLR command can be used to flush the input and output buffers for SPI
simulation. This resets the buffers and clear out all values. Notice that if the SPI is
currently shifting a value, this command allows the SPI to finish the transfer. See SPDI
command and SPDO command for accessing the input and output buffers of the SPI
interface.
Syntax
>SPCLR
Example
>SPCLR
Clear input and output buffer for SPI simulation

SPDI Command

The SPDI command allows the user to input data into the SPI. If a data parameter is given,
the value is placed into the next slot in the SPI input buffer. Otherwise, if no parameter is
given, a window is displayed with the input buffer values. Input values can be entered
while the window is open. An arrow points to the next value to be used as input to the SPI.
The maximum number of input values is 256 bytes.