HCS08 Full Chip Simulation
Peripheral Modules Commands
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Microcontrollers Debugger Manual
ADC Module
In Full Chip Simulation (FCS), this module simulates all functionality of the Analog to
Digital Conversion (ADC) module including data input on all ADC channels, flag polling,
interrupt operation as well as the bus and CGMXCLK reference clock sources. FCS mode
uses the buffered input structure to simulate the ADC inputs. The user can queue up to 256
data values. To queue the ADC Input Data, use the ADDI command in the command
prompt. If the data parameter is given, the value is placed into the next slot in the input
buffer. Otherwise, if no parameter is provided, a window is displayed with the input buffer
values. Input values can be entered while the window is open. An arrow points to the next
value to be used as input to the ADC. The conversion takes place after a proper value is
written to the ADC Status and Control register. Once the conversion occurs, the arrow
moves to the next value in the ADC Buffer.
Figure 18.8 ADC IN Buffer Display
At any point, use the ADCLR command to flush the input buffer for the ADC simulation.
After the conversion is complete, the first queued value is passed from the data buffer into
the ADC data register. It can be observed in the memory window by displaying the
memory location corresponding to the ADC data register.
Figure 18.9 Memory Component Window