Which byte is accessed is controlled by the SLPHBEN bit in the SCSI Control Two (SCNTL2) register.

Register: 0x45

SCSI Wide Residue (SWIDE)

Read/Write

7

0

SWIDE

x

x

x

x

x

x

x

x

 

 

 

SWIDE SCSI Wide Residue[7:0]

After a wide SCSI data receive operation, this register contains a residual data byte if the last byte received was never sent across the DMA bus. It represents either the first data byte of a subsequent data transfer, or it is a residue byte which should be cleared when an Ignore Wide Residue message is received. It may also be an overrun data byte. The power-up value of this register is indeterminate.

Register: 0x46

Memory Access Control (MACNTL)

Read/Write

7

 

 

 

4

3

2

1

0

 

 

TYP

 

DWR

DRD

PSCPT

SCPTS

 

 

 

 

 

 

 

 

 

1

1

 

1

1

0

0

0

0

 

 

 

 

 

 

 

 

 

TYP

 

Chip Type

 

 

 

 

[7:4]

These bits identify the chip type for software purposes.

Note: These bits no longer identify an 8XX device. These bits have been set to 0xF to indicate that the device should be uniquely identified by setting the PCI Configuration Enable bit in the Chip Test Two (CTEST2) register and using the PCI Revision ID and PCI Device ID which will be shadowed in the SCRIPTS Fetch Selector (SFS) register. Any devices that contain the value 0xF in this register should use this mechanism to uniquely identify the device.

SCSI Registers

4-81

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Image 173
LSI 53C875A Scsi Wide Residue Swide Read/Write, Swide Scsi Wide Residue70, Memory Access Control Macntl Read/Write, Typ