LSI 53C875A Figure 6.31 64 Kbytes ROM Read Cycle, Table 6 .35 =64 Kbytes ROM Read Cycle

6-50 Electrical Specifications
Figure 6.31 ≤64 Kbytes ROM Read Cycle
Table 6 .35 ≤=64 Kbytes ROM Read Cycle
Symbol Parameter Min Max Unit
t11 Address setup to MAS/ HIGH 25 – ns
t12 Address hold from MAS/ HIGH 15 – ns
t13 MAS/ pulse width 25 – ns
t14 MCE/ LOW to data clockedin 150 – ns
t15 Address valid to data clockedin 205 – ns
t16 MOE/LOWtodataclockedin 100 – ns
t17 Data hold from address,MOE/, MCE/ change 0 – ns
t18 Address out from MOE/, MCE/ HIGH 50 – ns
t19 Data setup to CLK HIGH 5 – ns
CLK
MAD
(Addressdriven by LSI53 C875A;
Datadriven by Memory)
MAS1/
(Drivenby LSI53C875A)
MAS0/
(Drivenby LSI53C875A)
MCE/
(Drivenby LSI53C875A)
MOE/
(Drivenby LSI53C875A)
MWE/
(Drivenby LSI53C875A)
Higher
Address Lower Address
Valid
Read
Data
t17
t12
t15
t14 t18
t16
t19
t11
t13