Table 6.35

64 Kbytes ROM Read Cycle

 

 

 

 

 

 

 

 

Symbol

Parameter

Min

Max

Unit

 

 

 

 

 

t11

Address setup to MAS/ HIGH

25

ns

t12

Address hold from MAS/ HIGH

15

ns

t13

MAS/ pulse width

25

ns

t14

MCE/ LOW to data clocked in

150

ns

t15

Address valid to data clocked in

205

ns

t16

MOE/ LOW to data clocked in

100

ns

t17

Data hold from address, MOE/, MCE/ change

0

ns

t18

Address out from MOE/, MCE/ HIGH

50

ns

t19

Data setup to CLK HIGH

5

ns

Figure 6.31

64 Kbytes ROM Read Cycle

 

 

 

CLK

MAD

(Address driven by LSI53C875A;

Data driven by Memory)

MAS1/ (Driven by LSI53C875A)

MAS0/ (Driven by LSI53C875A)

MCE/ (Driven by LSI53C875A)

MOE/ (Driven by LSI53C875A)

 

 

 

t17

Higher

Lower

 

Valid

 

Read

Address

Address

 

Data

t11

t12

t19

 

 

 

 

 

 

t13

 

t15

 

 

 

 

 

 

t14

t18

 

 

t16

 

MWE/

(Driven by LSI53C875A)

6-50

Electrical Specifications

Page 288
Image 288
LSI 53C875A technical manual ≤ 64 Kbytes ROM Read Cycle, Symbol Parameter Min Max Unit