LSI 53C875A technical manual Parallel ROM Interface

send command, the first byte of the data send command is assumed to be the high-order byte and is “married” with the low-order byte stored in the lower byte of the SCSI Output Data Latch (SODL) register before the two bytes are sent across the SCSI bus. For “N” consecutive wide data send Block Move commands, the first through the (Nth – 1) Block Move instructions should be Chained Block Moves.

CHMOV 5, 3 when Data_Out

Moves five bytes from address 0x03 in the host memory to the SCSI bus. Bytes 0x03, 0x04, 0x05, and 0x06 are moved and byte 0x07 remains in the low-order byte of the SCSI Output Data Latch (SODL) register and is married with the first byte of the following MOVE instruction.

MOVE 5, 9 when Data_Out

Moves five bytes from address 0x09 in the host memory to the SCSI bus.

2.3 Parallel ROM Interface

The LSI53C875A supports up to one megabyte of external memory in binary increments from 16 Kbytes, to allow the use of expansion ROM for add-in PCI cards. This interface is designed for low speed operations such as downloading instruction code from ROM; it is not intended for dynamic activities such as executing instructions.

System requirements include the LSI53C875A, two or three external 8-bit address holding registers (HCT273 or HCT374), and the appropriate memory device. The 4.7 kΩ pull-up resistors on the MAD bus require HC or HCT external components to be used. If in-system Flash ROM updates are required, a 7406 (high voltage open collector inverter), a MTD4P05, and several passive components are also needed. The memory size and speed is determined by pull-up resistors on the

8-bit bidirectional memory bus at power-up. The LSI53C875A senses this bus shortly after the release of the Reset signal and configures the Expansion ROM Base Address register and the memory cycle state machines for the appropriate conditions.

The external memory interface works with a variety of ROM sizes and speeds. An example set of interface drawings is in Appendix B, “External Memory Interface Diagram Examples.”

2-48 Functional Description