DSCL

Data_Scale

[14:13]

 

The LSI53C875A does not support the data register.

 

Therefore, these two bits are always cleared.

 

DSLT

Data_Select

[12:9]

 

The LSI53C875A does not support the data register.

 

Therefore, these four bits are always cleared.

 

PEN

PME_Enable

8

 

The LSI53C875A always returns a zero for this bit to

 

indicate that PME assertion is disabled.

 

R

Reserved

[7:2]

PWS[1:0]

Power State

[1:0]

Bits [1:0] are used to determine the current power state of the LSI53C875A. They are used to place the LSI53C875A in a new power state. Power states are defined as:

0b00 D0

0b01 D1

0b10 D2

0b11 D3hot

See Section 2.5, “Power Management,”in Chapter 2 for descriptions of the Power Management States.

Register: 0x46

Bridge Support Extensions (PMCSR_BSE)

Read Only

7

0

BSE

0

0

0

0

0

0

0

0

BSEBridge Support Extensions[7:0]

This register indicates PCI Bridge specific functionality. The LSI53C875A does not support extensions and always returns 0x00.

PCI Configuration Registers

4-17

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LSI 53C875A technical manual Dscl, Dslt, Pen, Bridge Support Extensions Pmcsrbse Read Only, BSEBridge Support Extensions70