LSI 53C875A technical manual Slow Memory ≤ 128 Kbytes Write Cycle

Table 6.34	Slow Memory (≤ 128 Kbytes) Write Cycle
Symbol	Parameter	Min	Max	Unit
t11	Address setup to MAS/ HIGH	25	–	ns
t12	Address hold from MAS/ HIGH	15	–	ns
t13	MAS/ pulse width	25	–	ns
t20	Data setup to MWE/ LOW	30	–	ns
t21	Data hold from MWE/ HIGH	20	–	ns
t22	MWE/ pulse width	100	–	ns
t23	Address setup to MWE/ LOW	60	–	ns
t24	MCE/ LOW to MWE/ HIGH	120	–	ns
t25	MCE/ LOW to MWE/ LOW	25	–	ns
t26	MWE/ HIGH to MCE/ HIGH	25	–	ns

Figure 6.30 Slow Memory (≤ 128 Kbytes) Write Cycle

CLK

MAD (Driven by LSI53C875A)

MAS1/ (Driven by LSI53C875A)

MAS0/ (Driven by LSI53C875A)

MCE/ (Driven by LSI53C875A)

MOE/ (Driven by LSI53C875A)

MWE/

(Driven by LSI53C875A)

Higher	Middle	Lower	Valid Write Data
Address	Address	Address
t11	t12
	t13
			t24
		t25		t
				26
		t20	t22	t21
			t23

PCI and External Memory Interface Timing Diagrams 6-49