LSI technical manual Driven by LSI53C875A Higher Valid Write Data

Table 6.32	Normal/Fast Memory (≥ 128 Kbytes) Single Byte Access Write Cycle
Symbol	Parameter	Min	Max	Unit
t11	Address setup to MAS/ HIGH	25	–	ns
t12	Address hold from MAS/ HIGH	15	–	ns
t13	MAS/ pulse width	25	–	ns
t20	Data setup to MWE/ LOW	30	–	ns
t21	Data hold from MWE/ HIGH	20	–	ns
t22	MWE/ pulse width	100	–	ns
t23	Address setup to MWE/ LOW	60	–	ns
t24	MCE/ LOW to MWE/ HIGH	120	–	ns
t25	MCE/ LOW to MWE/ LOW	25	–	ns
t26	MWE/ HIGH to MCE/ HIGH	25	–	ns

Figure 6.26 Normal/Fast Memory (≥ 128 Kbytes) Single Byte Access Write Cycle

CLK

MAD (Driven by LSI53C875A)

MAS1/ (Driven by LSI53C875A)

MAS0/ (Driven by LSI53C875A)

MCE/ (Driven by LSI53C875A)

MOE/ (Driven by LSI53C875A)

MWE/

(Driven by LSI53C875A)

Higher	1.	2.	Valid Write Data
Address
t11	t12
t13			t23
			t24
			t25	t26
			t20	t21
			t22

1. Middle Address 2. Lower Address

PCI and External Memory Interface Timing Diagrams 6-43