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5.11 MAC Input Vector Register (MACINVECTOR)
The MAC input vector register (MACINVECTOR) is shown in Figure 53 and described in Table 47.
Figure 53. MAC Input Vector Register (MACINVECTOR)
31 | 30 | 29 |
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| 18 | 17 | 16 |
USER | LINK | Reserved |
| HOST | STAT | ||
INT | INT |
| PEND | PEND | |||
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15 |
| 8 | 7 |
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| 0 | |
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| RXPEND |
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| TXPEND |
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LEGEND: R = Read only;
Table 47. MAC Input Vector Register (MACINVECTOR) Field Descriptions
Bit | Field | Value | Description |
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31 | USERINT |
| MDIO module user interrupt (USERINT) pending status bit |
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30 | LINKINT |
| MDIO module link change interrupt (LINKINT) pending status bit |
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Reserved | 0 | Reserved | |
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17 | HOSTPEND |
| EMAC module host error interrupt (HOSTPEND) pending status bit |
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16 | STATPEND |
| EMAC module statistics interrupt (STATPEND) pending status bit |
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RXPEND |
| Receive channels | |
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TXPEND |
| Transmit channels | |
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SPRUEF8F | C6472/TCI6486 EMAC/MDIO | 105 |
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