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EMAC Functional Architecture

2.3System-Level Connections

On the TCI6486/C6472 device, EMAC0 and EMAC1 support the following different types of interfaces to physical layer devices (PHYs) or switches. Each EMAC can be configured to only one interface at any given time. EMAC0 interface is selected by programming MACSEL0 [2:0] pins (see Table 4) and EMAC1 interface is selected by programming MACSEL1 [1:0] pins (see Table 5).

Table 4. EMAC0 Interface Selection Pins

MACSEL0 [2:0]

Interface

000

MII

001

RMII

010

GMII

011

RGMII

100

Not used

101

S3MII

110

Not used

111

Not used

 

 

Table 5. EMAC1 Interface Selection Pins

MACSEL1 [1:0]

Interface

00

Not used

01

S3MII

10

RGMII

11

RMII

 

 

Table 6 explains the decoding of MACSEL0 [2:0], MACSEL1[1:0], and EMAC1_EN of the DEVCTL register.

Table 6. MACSEL0[2:0], MACSEL1[1:0], and EMAC1_EN Decoding

 

MACSEL02

MACSEL01

MACSEL00

MACSEL11

MACSEL10

EMAC_EN

 

EMAC0

EMAC1

0

0

0

X

X

0

 

MII

None

 

 

 

 

 

 

 

 

 

 

0

0

0

0

X

1

 

MII

None

 

 

 

 

 

 

 

 

 

 

0

0

0

1

0

1

 

MII

RGMII

 

 

 

 

 

 

 

 

 

 

0

1

0

X

X

0

 

GMII

None

 

 

 

 

 

 

 

 

 

 

0

1

0

0

X

1

 

GMII

None

 

 

 

 

 

 

 

 

 

 

0

1

0

1

0

1

 

GMII

RGMII

 

 

 

 

 

 

 

 

 

 

0

0

1

X

X

0

 

RMII

None

 

 

 

 

 

 

 

 

 

 

0

1

1

X

X

0

 

RGMII

None

 

 

 

 

 

 

 

 

 

 

1

0

0

X

X

0

 

None

None

 

 

 

 

 

 

 

 

 

 

1

0

1

X

X

0

 

S3MII

None

 

 

 

 

 

 

 

 

 

 

0

0

1

0

0

1

 

RMII

None

 

 

 

 

 

 

 

 

 

 

0

0

1

0

1

1

 

RMII

S3MII

 

 

 

 

 

 

 

 

 

 

0

0

1

1

0

1

 

RMII

RGMII

 

 

 

 

 

 

 

 

 

 

0

0

1

1

1

1

 

RMII

RMII

 

 

 

 

 

 

 

 

 

 

0

1

1

0

0

1

 

RGMII

None

 

 

 

 

 

 

 

 

 

 

0

1

1

0

1

1

 

RGMII

S3MII

 

 

 

 

 

 

 

 

 

 

0

1

1

1

0

1

 

RGMII

RGMII

 

 

 

 

 

 

 

 

 

 

0

1

1

1

1

1

 

RGMII

RMII

 

 

 

 

 

 

 

 

 

 

1

0

0

0

0

1

 

None

None

 

 

 

 

 

 

 

 

 

 

1

0

0

0

1

1

 

None

S3MII

 

 

 

 

 

 

 

 

 

 

1

0

0

1

0

1

 

None

RGMII

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPRUEF8F –March 2006 –Revised November 2010

 

 

 

C6472/TCI6486 EMAC/MDIO 17

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Texas Instruments TMS320TCI6486 System-Level Connections, EMAC0 Interface Selection Pins, EMAC1 Interface Selection Pins