Texas Instruments TMS320TCI6486 manual MAC End-of-Interrupt Vector Register Maceoivector

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5.12 MAC End-of-Interrupt Vector Register (MACEOIVECTOR)

The MAC end-of-interrupt vector register (MACEOIVECTOR) is shown in Figure 54 and described in Table 48.

Figure 54. MAC End-of-Interrupt Vector Register (MACEOIVECTOR)

31	5	4	0
Reserved			MAC_EOI_VECTOR
R-0			R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Table 48. MAC End-of-Interrupt Vector Register (MACEOIVECTOR) Field Descriptions

Bit	Field	Value	Description
31-5	Reserved	0	Reserved
4	MAC_EOI_VECTOR		MAC end-of-interrupt vector
			The EOI_VECTOR[4:0] pins reflect the value written to this location one peripheral bus clock
			cycle after a write to this location. The EOI_WR signal is asserted for a single clock cycle after
			a latency of two peripheral bus clock cycles when a write is performed to this location.

106	C6472/TCI6486 EMAC/MDIO	SPRUEF8F –March 2006 –Revised November 2010
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