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EMAC Functional Architecture

Figure 7. S3MII Multi-PHY Configuration

Device #1

TXD

TX_SYNC

TX_CLK

RXD

RX_SYNC

RX_CLK

MHZ_125_CLK

Device #2

TXD

TX_SYNC

TX_CLK

RXD

RX_SYNC

RX_CLK

MHZ_125_CLK

Device #n

TXD

TX_SYNC

TX_CLK

RXD

RX_SYNC

RX_CLK

MHZ_125_CLK

125-MHz

 

 

125-MHz

 

 

 

 

 

zero-delay

 

 

 

XO

 

 

 

 

 

 

 

clock buffer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

External

logic

element

Low-skew

buffer

Zero-delay clock buffer

S3MII

multi-PHY TX_CLK TX_SYNC

P0_TXD P0_RXD

P1_TXD P1_RXD

Pn_TXD Pn_RXD

RX_SYNC

RX_CLK

SPRUEF8F –March 2006 –Revised November 2010

C6472/TCI6486 EMAC/MDIO

27

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Texas Instruments TMS320TCI6486 manual S3MII Multi-PHY Configuration