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3.3TPIC Registers
3.3.1TPCFG Registers
There are eight TPCFG registers (TPCFG0 through TPCFG7), one per transmit event. This register configuration is common to all C64x+ megamodules. The TPCFG register details are shown in Figure 26 and described in Table 19.
Figure 26. TPCFG Register
31 | 28 | 27 |
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| 16 |
| Reserved |
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| TIME_CFG |
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| 0000 |
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15 |
| 8 | 7 | 4 | 3 | 2 | 1 | 0 |
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| CNT_CFG |
| Reserved | TU | CU | TR | CR | |
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| 0000 | ||||||
LEGEND: R/W = Read/Write; R = Read only; |
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| Table 19. TPCFG Register Field Descriptions |
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Bit | Field | Value | Description |
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Reserved |
| Reserved | |
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TIME_CFG |
| Time delay configuration value | |
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CNT_CFG |
| Divide by N configuration value | |
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Reserved |
| Reserved | |
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3 | TU |
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| 0 | N/A |
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| 1 | Enables writes to TIME_CFG |
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2 | CU |
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| 0 | N/A |
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| 1 | Enables writes to CNT_CFG |
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1 | TR |
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| 0 | N/A |
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| 1 | Resets the timer counter |
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0 | CR |
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| 0 | N/A |
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| 1 | Resets the divide by N count |
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74 | C6472/TCI6486 EMAC/MDIO | SPRUEF8F |
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