EMAC Functional Architecture

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2.7.5Receive Pacer and Interrupt Combiner (RPIC)

The receive pacer and interrupt combiner (RPIC) block performs following functions:

Implements pacing for receive events.

Combines the output of the pacer module based on the settings of bits 16 to 23 in the EW_INTCTL register and generates a single MACRXINT interrupt per the C64x+ megamodule.

Receives a single PS_TICK and forwards it to all the pacing blocks.

Allows, per interrupt enabling or disabling of the interrupts, the setting of bits 16 to 23 in the EW_INTCTL register.

Figure 19 shows the block diagram of receive pacer and interrupt combiner (RPIC).

Figure 19. Receive Pacer and Interrupt Combiner

 

Receive￿pacer￿and￿interrupt￿combiner

 

RXEVT[0]

Pacing￿block

 

 

EW_INTCTL[16]

 

RXEVT[1]

Pacing￿block

 

 

EW_INTCTL[17]

 

RXEVT[2]

Pacing￿block

 

 

EW_INTCTL[18]

 

RXEVT[3]

Pacing￿block

 

 

EW_INTCTL[19]

MACRXINT

 

 

RXEVT[4]

Pacing￿block

 

 

EW_INTCTL[20]

 

RXEVT[5]

Pacing￿block

 

 

EW_INTCTL[21]

 

RXEVT[6]

Pacing￿block

 

 

EW_INTCTL[22]

 

RXEVT[7]

Pacing￿block

 

 

EW_INTCTL[23]

 

PS_TICK

EW_INTCTL[23:16]

 

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C6472/TCI6486 EMAC/MDIO

SPRUEF8F –March 2006 –Revised November 2010

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Texas Instruments TMS320TCI6486 manual Receive Pacer and Interrupt Combiner Rpic