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List of Tables

 

 

 

1

Serial Management Interface Pins

13

 

2

EMAC1_EN Pin Description

13

 

3

EMAC Clock Specifications

15

 

4

EMAC0 Interface Selection Pins

17

 

5

EMAC1 Interface Selection Pins

17

 

6

MACSEL0[2:0], MACSEL1[1:0], and EMAC1_EN Decoding

17

 

7

EMAC and MDIO Signals for MII Interface

19

 

8

EMAC and MDIO Signals for RMII Interface

20

 

9

EMAC and MDIO Signals for GMII Interface

22

 

10

EMAC and MDIO Signals for RGMII Interface

23

 

11

EMAC and MDIO Signals for S3MII Interface

26

 

12

Ethernet Frame Description

29

 

13

Basic Descriptors

31

 

14

Receive Frame Treatment Summary

61

 

15

Middle-of-Frame Overrun Treatment

62

 

16

Emulation Control

70

 

17

RPCFG Register Field Descriptions

72

 

18

RPSTAT Register Field Descriptions

73

 

19

TPCFG Register Field Descriptions

74

 

20

TPSTAT Register Field Descriptions

75

 

21

Management Data Input/Output (MDIO) Registers

76

 

22

MDIO Version Register (VERSION) Field Descriptions

77

 

23

MDIO Control Register (CONTROL) Field Descriptions

78

 

24

PHY Acknowledge Status Register (ALIVE) Field Descriptions

79

 

25

PHY Link Status Register (LINK) Field Descriptions

80

 

26

MDIO Link Status Change Interrupt (Unmasked) Register (LINKINTRAW) Field Descriptions

81

 

27

MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED) Field Descriptions

82

 

28

MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW) Field Descriptions

83

 

29

MDIO User Command Complete Interrupt (Masked) Register (USERINTMASKED) Field Descriptions

84

 

30

MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET) Field Descriptions ....

85

 

31

MDIO User Command Complete Interrupt Mask Clear Register (USERINTMASKCLEAR) Field

 

 

 

Descriptions

86

 

32

MDIO User Access Register 0 (USERACCESS0) Field Descriptions

87

 

33

MDIO User PHY Select Register 0 (USERPHYSEL0) Field Descriptions

88

 

34

MDIO User Access Register 1 (USERACCESS1) Field Descriptions

89

 

35

MDIO User PHY Select Register 1 (USERPHYSEL1) Field Descriptions

90

 

36

Ethernet Media Access Controller (EMAC) Registers

91

 

37

Transmit Identification and Version Register (TXIDVER) Field Descriptions

95

 

38

Transmit Control Register (TXCONTROL) Field Descriptions

96

 

39

Transmit Teardown Register (TXTEARDOWN) Field Descriptions

97

 

40

Receive Identification and Version Register (RXIDVER) Field Descriptions

98

 

41

Receive Control Register (RXCONTROL) Field Descriptions

99

 

42

Receive Teardown Register (RXTEARDOWN) Field Descriptions

100

 

43

Transmit Interrupt Status (Unmasked) Register (TXINTSTATRAW) Field Descriptions

101

 

44

Transmit Interrupt Status (Masked) Register (TXINTSTATMASKED) Field Descriptions

102

 

45

Transmit Interrupt Mask Set Register (TXINTMASKSET) Field Descriptions

103

 

46

Transmit Interrupt Mask Clear Register (TXINTMASKCLEAR) Field Descriptions

104

 

 

 

8

List of Tables

SPRUEF8F –March 2006 –Revised November 2010

 

 

 

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Texas Instruments TMS320TCI6486 manual List of Tables