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List of Figures

 

 

 

1

EMAC and MDIO Block Diagram

12

 

2

Ethernet Configuration with MII Interface

18

 

3

Ethernet Configuration with RMII Interface

20

 

4

Ethernet Configuration with GMII Interface

21

 

5

Ethernet Configuration with RGMII Interface

23

 

6

Ethernet Configuration with S3MII Interface

25

 

7

S3MII Multi-PHY Configuration

27

 

8

S3MII Switch Configuration

28

 

9

Ethernet Frame

29

 

10

Basic Descriptor Format

31

 

11

Typical Descriptor Linked List

32

 

12

Transmit Descriptor Format

34

 

13

Receive Descriptor Format

37

 

14

EMIC Block Diagram

41

 

15

Pacing Block

42

 

16

TDSM State Transition Diagram

43

 

17

DSM State Transition Diagram

44

 

18

Transmit Pacer and Interrupt Combiner

45

 

19

Receive Pacer and Interrupt Combiner

46

 

20

Common Interrupt Combiner

47

 

21

MDIO Module Block Diagram

48

 

22

EMAC Module Block Diagram

52

 

23

EW_INTCTL Register

71

 

24

RPCFG Register

72

 

25

RPSTAT Register

73

 

26

TPCFG Register

74

 

27

TPSTAT Register

75

 

28

Prescalar Configuration Register (PSCFG)

75

 

29

MDIO Version Register (VERSION)

77

 

30

MDIO Control Register (CONTROL)

78

 

31

PHY Acknowledge Status Register (ALIVE)

79

 

32

PHY Link Status Register (LINK)

80

 

33

MDIO Link Status Change Interrupt (Unmasked) Register (LINKINTRAW)

81

 

34

MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED)

82

 

35

MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)

83

 

36

MDIO User Command Complete Interrupt (Masked) Register (USERINTMASKED)

84

 

37

MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)

85

 

38

MDIO User Command Complete Interrupt Mask Clear Register (USERINTMASKCLEAR)

86

 

39

MDIO User Access Register 0 (USERACCESS0)

87

 

40

MDIO User PHY Select Register 0 (USERPHYSEL0)

88

 

41

MDIO User Access Register 1 (USERACCESS1)

89

 

42

MDIO User PHY Select Register 1 (USERPHYSEL1)

90

 

43

Transmit Identification and Version Register (TXIDVER)

95

 

44

Transmit Control Register (TXCONTROL)

96

 

45

Transmit Teardown Register (TXTEARDOWN)

97

 

46

Receive Identification and Version Register (RXIDVER)

98

 

47

Receive Control Register (RXCONTROL)

99

 

 

 

6

List of Figures

SPRUEF8F –March 2006 –Revised November 2010

 

 

 

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Texas Instruments TMS320TCI6486 manual List of Figures