Fluke 5720A Theory of Operation, Digital Section Detailed Circuit Description, Signal Name

Models: 5720A

1 570
Download 570 pages 1.07 Kb
Page 85
Image 85
Table 2-3. CPU Acronym Glossary

Theory of Operation 2

Digital Section Detailed Circuit Description

Table 2-3. CPU Acronym Glossary

Signal Name

A01-A23

ADCLKCS*

AS*

BERR*

BGACK*

BR*

BRPDRTINT*

BRPDTK*

BRPIEEEINT*

CLKCALINT* D00-D15

DOGCLR

DOGINTH

DRTDTK*

DTACK* E EXDUARTINT* FAN1

FAN2

FANINT*

FC0

FC1

FC2

FPDTK*

FRNTPNLCS*

FRNTPNLEN*

GCDRTCS*

GCDUARTINT*

INTRCNTL1

INTRCNTL2

IPL0*

IPL1*

IPL2*

KEYBRDINT*

LDS*

MISCCS*

NVMCS*

NVMOE*

PROM0CS*

PROM1CS*

PROM2CS*

PSFAILINT*

RAM0CS*

RAM1CS*

RAM2CS*

R/WR*

RDINT*

RDL*

RDU*

RDY/BSYL

RPSEL*

RRPNLEN* RXDA RCVB SCLK TXDA TXDB UDS* WRL* WRU*

XDUARTCS*

Function

Address lines

Clock/calendar (U33) chip select Address strobe

Bus error

Bus grant acknowledge Bus request

Rear panel DUART interrupt

Rear panel data transfer acknowledge Rear panel IEEE-488 interrupt Clock/calendar interrupt

Data lines

Dog clear (clears watchdog timer)

Dog interrupt (interrupt from watchdog timer) DUART data transfer acknowledge

Data transfer acknowledge

Enable for 6800 family devices (737.28 kHz clock) External DUART Interru

Signal monitoring fan 1 Signal monitoring fan 2 Fan monitor interrupt Function code output 0 Function code output 1 Function code output 2

Front panel data transfer acknowledge Front panel chip select

Front panel enable

Guard crossing DUART chip select Guard crossing DUART interrupt Interrupt control 1

Interrupt control 2 Interrupt priority level 0 Interrupt priority level 1 Interrupt priority level 2 Keyboard interrupt Lower data strobe

Miscellaneous chip select enable (upper address bits decoder) Nonvolatile memory chip select

Nonvolatile memory output enable PROM 0 chip select (U15 and U16) PROM 1 chip select (U17 and U18) PROM 2 chip select (U23 and U24) Power supply fail interrupt

RAM chip select (U19 and U20) RAM chip select (U21 and U22) RAM chip select (U40 and U41) Read/write

Read interrupt Read data lower Read data upper Ready/busy

Rear panel chip select Rear panel enable Receive Data Port A Receive Data Port B Serial clock Transmit Data Port A Transmit Data Port B Upper data strobe Write lower

Write upper

External DUART chip select

2-23

Page 85
Image 85
Fluke 5720A Theory of Operation, Digital Section Detailed Circuit Description, 3. CPU Acronym Glossary, Signal Name