CDM Registers
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 5-17
5.5.7 CDM System Oscillator Configuration Register—MBAR + 0x0218
This register contains the System Oscillator disable bit. The system oscillator is disabled if an external clock source (not a crystal) drives the
oscillator in package pin. The crystal oscillator pad cell is disabled to reduce power consumption (~6mW for system oscillator).
Bit Name Description
0 — Reserved for test. Write 0.
1–11 — Reserved for future use. Write 0.
12 mem_clk_en Memory Clock Enable—controls SDRAM Controller module clocks
Memory Controller IPB_CLK is not controlled by mem_clk_en.
13 pci_clk_en PCI Bus Clock Enable—controls PCI bus control module clocks
Note: PCI Arbiter and external PCI Bus clocks are not controlled by pci_clk_en.
14 lpc_clk_en Local Plus Bus Clock Enable—controls LP bus control module clocks
15 slt_clk_en Slice Timer Clock Enable—controls slice timer module clocks
16 scom_clk_en BestComm Clock Enable—controls BestComm module clocks
17 ata_clk_en ATA Clock Enable—controls ATA disk drive control module clocks
18 eth_clk_en Ethernet Clock Enable—controls Ethernet Controller module clocks
19 usb_clk_en Universal Serial Bus Clock Enable—controls USB module clock
20 spi_clk_en SPI Clock Enable—controls SPI module clocks
21 bdlc_clk_en BDLC Clock Enable—controls BDLC module clocks
22 psc5_clk_en PSC5 Clock Enable—control clock to the PSC5 module
23 psc4_clk_en PSC4 Clock Enable—control clock to the PSC4 module
24 psc3_clk_en PSC3 Clock Enable—control clock to the PSC3 module
25 psc2_clk_en PSC2 Clock Enable—control clock to the PSC2 module
26 psc1_clk_en PSC1 Clock Enable—control clock to the PSC1 module
27 psc6_clk_en PSC6 Clock Enable—control clock to the PSC6 module
28 mscan_clk_en MSCAN Clock Enable—controls MSCAN module clocks
29 i2c_clk_en I2C Clock Enable—controls I2C module clocks
30 timer_clk_en Timer Clock Enable—controls timer module clocks
Note: 2 timers for wake-up mode do not have gated clocks.
31 gpio_clk_en GPIO Clock Enable—controls some GPIO module clocks
Note: GPIO wake-up mode circuitry uses free running IPB_CLK
Note: An enable value of 1 enables the corresponding clock. An enable value of 0 disables corresponding clock.

Table5 -14. CDM System Oscillator Configuration Register

msb 0123456789101112131415
R
Reserved
Write 0
sys_osc_
disable
Reserved
Write 0
W
RESET: 0 0 0 0000000000000