Task Table (Entry Table)
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 13-3
Each task has an entry (8 long words) that contains information about the microcode’s location (start address and stop address) in memory as
well as pointers to the variable table to be used in the task, the Function Descriptor Table for the logic functions used within the task, the
Context Save area used during task switch/swap and some specific flags to enable performance affecting modes such as speculative reads,
prefetch enable, readline and combined write.
A task’s code should always be loaded into SRAM as the SDMA engine can fetch its descriptors from this internal memory with one cycle
access per instruction. It is not recommended to place the code in SDRAM as there will then be a few overhead clocks which are needed to
load the SDMA instruction unit.
13.7 Task Table (Entry Table)
The Task Table (or Entry Table) is a memory region containing pointers to each SDMA task. A Task Table Base Address Register (taskBAR)
sets the location of the Task Table itself. Each entry in the Task Table contains pointers to the task’s first descriptor, last descriptor, Variable
Table, and other task-specific information.
13.8 Task Descriptor Table
Each Task Descriptor Table is a memory region containing the descriptors that comprise the task. The pointers in the Task Table define the
beginning and end of each Task Descriptor Table.
13.9 Variable Table
Each task has a private 32-word Variable Table, where a word is four bytes (32 bits). According to the application requirements, the user
initializes some of the words in the Variable Table as follows. The first 24 words are for pointers, counter values and initial data. The DMA
Engine manipulates these variables as it executes loops. The next 8 words hold words-aligned, two-byte (“short word” or 16 bit word)
increment variables.
13.10 Function Descriptor Table
An area of 256 bytes divided in 4 groups of 64 bytes. Each group can represent a set of 16 different Logic Functions belonging to a single
execution unit. Every function is encoded with a single word (32 bits).
The implemented SDMA engine uses only one out of four potential Execution Units, execution unit 3, so all the functions needed by the task
will be encoded in the third group (starting at offset 0xC0 from the start address of the Function Descriptor Table). The other words are
reserved and must be written to ‘0’ to maintain memory alignment.
For space optimization, tasks which use the same logic functions could share a single Function Descriptor Table avoiding the redundancy of
re-writing the same table many times in SRAM.
13.11 Context Save Area
This is an area allocated for each task to allow the SDMA engine to save vital data (such as index values, etc.) during a task switch operation
to allow later restoration.
The context save area should never be used or modified by the user as it is managed directly by the SDMA engine.
13.12 External DMA Request
BestComm supports 64 user selectable request sources. 32 of them are controllable via GPIO pins, see SDMA Request MuxControl Register.
This GPIO group is split up into two different kind of GPIO’s, 24 simple and 8 simple interrupt GPIO’s. The differences are:
• Simple GPIO’s: The external request event must be kept asserted until the first, intended data transaction is executed.
• Simple interrupt GPIO’s: The external request event can be deasserted before the first, intended data transaction has started.
Additionally, the external request can generate an interrupt for the e300 core.
The GPIO, which is indended to generate a DMA request, must be enabled and set up as input, in both cases (see General Purpose I/O (GPIO)
chapter).
NOTE
MPC5200B doesn’t support external DMA Acknowledge.
13.13 External DMA Breakpoint
The SDMA engine can be halted if the Enable Breakpoint (EB) and the Enable External Breakpoint (E) bits of the SDMA Debug Module
Control Register are set and the 603e e300 core hits an Instruction Address Breakpoint or a Data Address Breakpoint.