MPC5200B Users Guide, Rev. 1
19-28 Freescale Semiconductor
Functional Description
A double buffer scheme de-couples the reloading of the transmit buffer from the actual message sending and, as such, reduces the reactiveness
requirements on the CPU. Problems can arise if the sending of a message is finished while the CPU re-loads the second buffer. No buffer
would then be ready for transmission and the bus would be released.
At least three transmit buffers are required to meet the first of the above requirements under all circumstances. The MSCAN has three transmit
buffers.
The second requirement calls for some sort of internal prioritization which the MSCAN implements with the “local priority” concept
described in Section 19.7.2.2, Transmit Structures.
19.7.2.2 Transmit Structures
The MSCAN has a triple transmit buffer scheme which allows multiple messages to be set up in advance and achieve an optimized real-time
performance. The three buffers are arranged as shown in Section Figure19-3., User Model for Message Buffer Organization.
All three buffers have a 13 byte data structure similar to the outline of the receive buffers Section 19.6, Programmer’s Model of Message
Storage. An additional MSCAN Transmit Buffer Priority Register (TBPR)—MBAR + 0x0979 / 0x09F9 contains an 8-bit “Local Priority”
field (PRIO). The remaining two bytes are used for time stamping of a message, if required (see Section 19.6.5, MSCAN Time Stamp Register
High (TSRH)—MBAR + 0x097C / 0x09FC, Section 19.6.6, MSCAN Time Stamp Register Low (TSRL)—MBAR + 0x097D / 0x09FD).
To transmit a message, the CPU has to identify an available transmit buffer which is indicated by a set Transmitter Buffer Empty (TXEx) flag
Section 19.5.9, MSCAN Transmitter Flag Register (CANTFLG)—MBAR + 0x090C / 0x98C. If a transmit buffer is available, the CPU has to
set a pointer to this buffer by writing to the CANTBSEL register (Section 19.5.13, MSCAN Transmit Buffer Selection (CANTBSEL)—MBAR
+ 0x0914 /0x0991). This makes the respective buffer accessible within the CANTXFG address space Section 19.6, Programmer’s Model of
Message Storage. The algorithmic feature associated with the CANTBSEL register simplifies the transmit buffer selection. In addition this
scheme makes the handler software simpler as only one address area is applicable for the transmit process. In addition the required address
space is minimized.
The CPU then stores the identifier, the control bits and the data content into one of the transmit buffers. Finally, the buffer is flagged as ready
for transmission by clearing the associated TXE flag.
The MSCAN then schedules the message for transmission and signals the successful transmission of the buffer by setting the associated TXE
flag. A transmit interrupt Section 19.7.9.1, Transmit Interrupt is generated1 when TXEx is set and can be used to drive the application software
to re-load the buffer.
In case more than one buffer is scheduled for transmission when the CAN bus becomes available for arbitration, the MSCAN uses the “local
priority” setting of the three buffers to determine the prioritization. For this purpose, every transmit buffer has an 8-bit local priority field
(PRIO). The application software programs this field when the message is set up. The local priority reflects the priority of this particular
message relative to the set of messages being transmitted from this node. The lowest binary value of the PRIO field is defined to be the highest
priority. The internal scheduling process takes place whenever the MSCAN arbitrates for the bus. This is also the case after the occurrence of
a transmission error.
When a high priority message is scheduled by the application software, it may become necessary to abort a lower priority message in one of
the three transmit buffers. As messages that are already in transmission cannot be aborted, the user has to request the abort by setting the
corresponding Abort Request bit (ABTRQ) Section 19.5.12, MSCAN Transmitter Message Abort Ack (CANTAAK)—MBAR +0x0911 /
0x0991. The MSCAN then grants the request, if possible, by: 1) setting the corresponding Abort Acknowledge flag (ABTAK) in the
CANTAAK register, 2) setting the associated TXE flag to release the buffer, and 3) generating a transmit interrupt. The transmit interrupt
handler software can tell from the setting of the ABTAK flag whether the message was aborted (ABTAK=1) or sent (ABTAK=0).
19.7.2.3 Receive Structures
The received messages are stored in a four stage input FIFO. The four message buffers are alternately mapped into a single memory area
Section Figure 19-3., User Model for Message Buffer Organization. While the background receive buffer (RxBG) is exclusively associated
with the MSCAN, the foreground receive buffer (RxFG) is addressable by the CPU Section Figure19-3., User Model for Message Buffer
Organization. This scheme simplifies the handler software as only one address area is applicable for the receive process.
All receive buffers have a size of 15 bytes to store the CAN control bits, the identifier (standard or extended), the data contents and a time
stamp, if enabled (for details Section 19.6, Programmer’s Model of Message Storage)2.
The Receiver Full flag (RXF) Section 19.5.7, MSCAN Receiver Flag Register (CANRFLG)—MBAR+0x0908 / 0x988 signals the status of the
foreground receive buffer. When the buffer contains a correctly received message with a matching identifier, this flag is set.
On reception, each message is checked to see if it passes the filter (Section 19.7.3, Identifier Acceptance Filter) and in parallel, is written into
the active RxBG. After successful reception of a valid message the MSCAN shifts the content of RxBG into the receiver FIFO3, sets the RXF
1. The transmit interrupt occurs only if not masked. A polling scheme can be applied on TXEx also.
2. Reference the Bosch CAN 2.0A/B protocol specification dated September 1991 for details.
3. Only if the RXF flag is not set.