Freescale Semiconductor MPC5200B 7.3 General Purpose I /O (GPIO )

MPC5200B Users Guide, Rev. 1
7-22 Freescale Semiconductor
General Purpose I/O (GPIO)
7.3 General Purpose I /O (GPIO )
There are a total of 56 possible GPIO pins on the MPC5200B. Virtually all of these pins are shared with alternate hardware functions.
Therefore, GPIO availability is entirely dependant on the peripheral set a particular application requires.
There are 5 basic types of GPIO pins, controlled by separate register groupings, and in some cases, different register modules:
• 24 “Simple” GPIO, controlled in the standard GPIO register module.
• 8 “Output Only” GPIO, controlled in the standard GPIO register module.
• 8 “Interrupt” GPIO, controlled in the standard GPIO register module.
• 8 “Wakeup” GPIO, controlled in the WakeUp GPIO register module.
• 8 “Timer” GPIO, controlled in the General Purpose Timer register module.
There is a hierarchy of GPIO functionality. Higher function GPIO can be programmed to operate at any lower functional level. The hierarchy,
from lowest to highest, is as follows:
•Output Only—As the name suggests, these GPIO cannot be programmed as Inputs. As outputs, they can be programmed to emulate
an Open-Drain output.
•Simple—Same as Output Only, but with additional capability to be programmed as inputs, with a corresponding Input Value register
that can be read by software.
•Interrupt—Same as Simple, but with additional capability of generating an Interrupt to the CPU during normal powered-up mode.
The Interrupt Type can be programmed as edge (any/rising/falling/2nd edge) sensitive. These GPIO are sometimes referred to as
“Simple Interrupt”.
•Wakeu p—Same as Interrupt, but with additional capability of generating an Interrupt during Deep Sleep mode. Includes Interrupt
Type registers and has an extra enable bit to distinguish between Simple Interrupt or WakeUp Interrupt operation.
•Timer GPIO—Operates with Simple GPIO capability, but can generate CPU Interrupts if configured as Input Capture timer mode.
These Timer GPIO have special capabilities and limitations, which are described in Section7.4, General Purpose Timers (GPT).
Timer GPIO does not fit cleanly into the GPIO functional hierarchy concept, and should therefore be considered as a unique GPIO
function.
GPIO functionality is available on an I/O pin only if the pin is enabled for GPIO usage in the Section 7.3.2.1.1, GPS Port Configuration
Register—MBAR + 0x0B00. The GPIOPCR register controls the top level pin-muxing, which sets an I/O pin’s usage between some hardware
function(s) and GPIO. If the pin is available for GPIO, the associated GPIO registers must be enabled and configured by software to complete
the GPIO operation for that specific pin. If a Timer GPIO is consumed by an alternate hardware function, it is still available to work as an
internal General Purpose Timer (GPT).
Simple GPIO are controlled by a group of registers in the Standard GPIO module. They are organized in relation to the multi-function
hardware port groupings. For example, you will see a GPIO field named PSC1 (4 bits) that corresponds to the 4 Simple GPIO available on
the PSC1 port group. There is also a WakeUp GPIO on the PSC1 port. However, this pin, as GPIO, would be controlled by a separate register
in the Wakeup GPIO module. Even though the pins are physically scattered throughout the multi-function port groups, register control
groupings exist for the:
• 8 Wakeup GPIO pins
• 8 Interrupt GPIO pins, and
• 8 Output-Only GPIO pins.
Only Simple GPIO register groupings correspond to the physical pin groupings.
Table7-20 lists all 56 GPIO pins.
Table 7-20. GPIO Pin List
GPIO PIN Alternate Functionality Interrupt WakeUp
TIMER_0 Timer_GPIO /ATA/CAN2 Only as Timer No
TIMER_1 Timer_GPIO /ATA/CAN2 Only as Timer No
TIMER_2 Timer_GPIO/SPI Only as Timer No
TIMER_3 Timer_GPIO/SPI Only as Timer No
TIMER_4 Timer_GPIO/SPI Only as Timer No
TIMER_5 Timer_GPIO/SPI Only as Timer No
TIMER_6 Timer_GPIO Only as Timer Yes (Timer IC)
TIMER_7 Timer_GPIO Only as Timer Yes (Timer IC)