e300 COP/BDM Interface
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor 21-9
Preload: To shift an initial value into the boundary scan register prior to loading the EXTEST or CLAMP instruction into the Instruction
register. Capture value may be examined or ignored. Update value has no effect until EXTEST/CLAMP instruction is loaded. It is then
presented at the device pins.

21.8.4 EXTEST

The EXTEST instruction selects the Boundary Scan DR to be logically connected between TDI and TDO during DR shift operations. It also
forces the Boundary Scan register contents to appear at the pins of the device. The state of all pins is captured at the TCK rising edge in the
Capture-DR TAP Controller state. The update value appears on the pins at the TCK falling edge in the Update-DR state. EXTEST does not
affect on-chip pull-up or pulldown resistors.

21.8.5 CLAMP

The CLAMP instruction forces the contents of the Boundary Scan DR to appear at the boundary of the microprocessor block, just like the
EXTEST instruction, but selects the 1-bit Bypass DR to be logically connected between TDI and TDO during DR shift operations. This allows
a static data pattern to be driven onto the device pins, while at the same time minimizing the length of shifts to access test data registers on
other devices in the JTAG scan chain. CLAMP does not affect on-chip pull-up or pull-down resistors.

21.8.6 HIGHZ

The HIGHZ instruction selects the 1-bit Bypass DR to be logically connected between TDI and TDO during DR shift operations, and also
forces all output and bidirectional pins of the device into a non-driving state. Input pins, and the input portion of bidirectional pins, are not
affected.
21.9 e300 COP/BDM Interface
The MPC5200B functional pin interface and internal logic provides access to the embedded e300 processer core through the Freescale
standard COP/BDM interface. For information on the connection between COP connector and MPC5200B refer to the MPC5200B Hardware
Specifications.