Nortel Networks NN43001-301 manual Supported Clock Controllers, NTRB53 Clock Controller

Description 157

When only two switches are interconnected, synchronization can be achieved by operating the two systems in a master/slave mode whereby one system derives its timing from the other. However, in a network of digital systems, slips can be better prevented by forcing all digital systems to use a common reference clock (see Figure 59 "Hierarchical Synchronization" (page 159)).

Supported Clock Controllers

For Large Systems, the following clock controllers are supported:

•NTRB53

•QPC471

•QPC775

NTRB53 Clock Controller

The NTRB53 Clock Controller is a replacement for the QPC471 and QPC775 Clock Controllers. The NTRB53 clock controller retains existing functionality.

Software configuration of the clock remains unchanged. A PSDL object allows field upgrades of the clock’s firmware. Overlay changes allow for force download and status checking. Support for the IDC command and hardware inventory are also included.

System Initialization During system initialization, the system software will verify if the clock controllers equipped in the system are the downloadable clock controllers (NTRB53) or not. If the clock controllers are identified as the downloadable clock controller cards, then both downloadable clock controller cards will be checked for the software version number they are running with. This is compared with the version number of the PSDL file stored in the system software database.

If there is a mismatch between the two version numbers and the system database has the higher version number, the card will be put in the PSDL downloading tree. Once the entry is added in the PSDL tree, the preprocess step is done. The next step is for the system to initiate the downloading in the background, using the PSDL tree. As soon as the download complete message is received from the card, the CPU sends a message to reset the clock controller card so that it boots with the new software. Once a self-test is complete the core sends an enable base message to enable the card.

Maintenance Overlays Downloading can be initiated from LD 60 for the inactive clock controller card as part of the enabling sequence of the card. A download can be forced by specifying the optional parameter FDL (Force Download) when enabling the card. At the prompt, enter:

Nortel Communication Server 1000

ISDN Primary Rate Interface Installation and Commissioning

NN43001-301 02.03 Standard

Release 5.5 7 December 2007

Copyright © 2003-2007, Nortel Networks