Sun Microsystems V20Z, V40z manual Table H-44BIOS Post Codes

Models: V20Z V40z

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TABLE H-44BIOS POST Codes

POST Code

Description

 

 

13Initialize PCI bus mastering devices

14Initialize keyboard controller

16BIOS ROM checksum

17Initialize cache before memory autosize

188254 programmable interrupt timer initialization

1A

8237 DMA controller initialization

1C

Reset programmable interrupt controller

20Test DRAM refresh

22Test 8742 keyboard controller

24Set ES segment register to 4GB

26Enable gate A20 line

28Autosize DRAM

29Initialize POST memory manager

2A

Clear 512KB base RAM

2C

RAM failure on address line xxxx

2E

RAM failure on data bits xxxx of low byte of memory bus

2F

Enable cache before system BIOS shadow

30RAM failure on data bits xxxx of high byte of memory bus

32Test CPU bus clock frequency

33Initialize Phoenix Dispatch Manager

36Warm start shut down

38Shadow system BIOS ROM

3A

Autosize cache

3C

Advanced configuration of chipset registers

3D

Load alternate registers with CMOS values

41Initialize extended memory for RomPilot

42Initialize interrupt vectors

45POST device initialization

46Check ROM copyright notice

47Initialize I20 support

188 Sun Fire V20z and Sun Fire V40z Servers, Server Management Guide • May, 2004

Page 210
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Sun Microsystems V20Z, V40z manual Table H-44BIOS Post Codes