Contents
Preface |
| 10 | ||
1 | Introduction | 12 | ||
| 1.1 | Purpose of the Peripheral | 12 | |
| 1.2 | Features | 12 | |
| 1.3 | Functional Block Diagram | 13 | |
| 1.4 | Industry Standard(s) Compliance Statement | 14 | |
2 | Architecture | 14 | ||
| 2.1 | Clock Control | 14 | |
| 2.2 | Memory Map | 15 | |
| 2.3 | Signal Descriptions | 15 | |
| 2.4 | Ethernet Protocol Overview | 19 | |
| 2.5 | Programming Interface | 20 | |
| 2.6 | EMAC Control Module | 31 | |
| 2.7 | MDIO Module | 34 | |
| 2.8 | EMAC Module | 38 | |
| 2.9 | Media Independent Interface (MII) | 41 | |
| 2.10 | Packet Receive Operation | 45 | |
| 2.11 | Packet Transmit Operation | 50 | |
| 2.12 | Receive and Transmit Latency | 50 | |
| 2.13 | Transfer Node Priority | 51 | |
| 2.14 | Reset Considerations | 51 | |
| 2.15 | Initialization | 52 | |
| 2.16 | Interrupt Support | 56 | |
| 2.17 | Power Management | 60 | |
| 2.18 | Emulation Considerations | 60 | |
3 | EMAC Control Module Registers | 61 | ||
| 3.1 | EMAC Control Module Identification and Version Register (CMIDVER) | 61 | |
| 3.2 | EMAC Control Module Software Reset Register (CMSOFTRESET) | 62 | |
| 3.3 | EMAC Control Module Emulation Control Register (CMEMCONTROL) | 62 | |
| 3.4 | EMAC Control Module Interrupt Control Register (CMINTCTRL) | 63 | |
| 3.5 | EMAC Control Module Receive Threshold Interrupt Enable Register |
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| (CMRXTHRESHINTEN) | 64 | |
| 3.6 | EMAC Control Module Receive Interrupt Enable Register (CMRXINTEN) | 64 | |
| 3.7 | EMAC Control Module Transmit Interrupt Enable Register (CMTXINTEN) | 65 | |
| 3.8 | EMAC Control Module Miscellaneous Interrupt Enable Register (CMMISCINTEN) | 66 | |
| 3.9 | EMAC Control Module Receive Threshold Interrupt Status Register |
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| (CMRXTHRESHINTSTAT) | 67 | |
| 3.10 | EMAC Control Module Receive Interrupt Status Register (CMRXINTSTAT) | 67 | |
| 3.11 | EMAC Control Module Transmit Interrupt Status Register (CMTXINTSTAT) | 68 | |
| 3.12 | EMAC Control Module Miscellaneous Interrupt Status Register (EWMISCSTAT) | 69 | |
| 3.13 | EMAC Control Module Receive Interrupts per Millisecond Register (CMRXINTMAX) | 70 | |
| 3.14 | EMAC Control Module Transmit Interrupts per Millisecond Register (CMTXINTMAX) | 70 | |
4 | MDIO Registers | 71 | ||
| 4.1 | MDIO Version Register (VERSION) | 71 | |
| 4.2 | MDIO Control Register (CONTROL) | 72 | |
Table of Contents | 3 |
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