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Architecture

2.10.8Promiscuous Receive Mode

When the promiscuous receive mode is enabled by setting the RXCAFEN bit in the receive multicast/broadcast/promiscuous channel enable register (RXMBPENABLE), nonaddress matching frames that would normally be filtered are transferred to the promiscuous channel. Address matching frames that would normally be filtered due to errors are transferred to the address match channel when the RXCAFEN and RXCEFEN bits in RXMBPENABLE are set. A frame is considered to be an address matching frame only if it is enabled to be received on a unicast, multicast, or broadcast channel. Frames received to disabled unicast, multicast, or broadcast channels are considered nonaddress matching.

MAC control frames address match only if the RXCMFEN bit in RXMBPENABLE is set. The RXCEFEN and RXCSFEN bits in RXMBPENABLE determine whether error frames are transferred to memory or not, but they do not determine whether error frames are address matching or not. Short frames are a special type of error frames.

A single channel is selected as the promiscuous channel by the RXPROMCH bit in RXMBPENABLE. The promiscuous receive mode is enabled by the RXCMFEN, RXCEFEN, RXCSFEN, and RXCAFEN bits in RXMBPENABLE. Table 6 shows the effects of the promiscuous enable bits. Proper frames are frames that are between 64 bytes and the value in the receive maximum length register (RXMAXLEN) bytes in length inclusive and contain no code, align, or CRC errors.

Table 6. Receive Frame Treatment Summary

Address Match

RXCAFEN

RXCEFEN

RXCMFEN

RXCSFEN

Receive Frame Treatment

0

0

X

X

X

No frames transferred.

0

1

0

0

0

Proper frames transferred to promiscuous channel.

0

1

0

0

1

Proper/undersized data frames transferred to

 

 

 

 

 

promiscuous channel.

0

1

0

1

0

Proper data and control frames transferred to

 

 

 

 

 

promiscuous channel.

0

1

0

1

1

Proper/undersized data and control frames

 

 

 

 

 

transferred to promiscuous channel.

0

1

1

0

0

Proper/oversize/jabber/code/align/CRC data frames

 

 

 

 

 

transferred to promiscuous channel. No control or

 

 

 

 

 

undersized/fragment frames are transferred.

0

1

1

0

1

Proper/undersized/fragment/oversize/jabber/code/

 

 

 

 

 

align/CRC data frames transferred to promiscuous

 

 

 

 

 

channel. No control frames are transferred.

0

1

1

1

0

Proper/oversize/jabber/code/align/CRC data and

 

 

 

 

 

control frames transferred to promiscuous channel.

 

 

 

 

 

No undersized frames are transferred.

0

1

1

1

1

All nonaddress matching frames with and without

 

 

 

 

 

errors transferred to promiscuous channel.

1

X

0

0

0

Proper data frames transferred to address match

 

 

 

 

 

channel.

1

X

0

0

1

Proper/undersized data frames transferred

 

 

 

 

 

to address match channel.

1

X

0

1

0

Proper data and control frames transferred to

 

 

 

 

 

address match channel.

1

X

0

1

1

Proper/undersized data and control frames

 

 

 

 

 

transferred to address match channel.

1

X

1

0

0

Proper/oversize/jabber/code/align/CRC data frames

 

 

 

 

 

transferred to address match channel. No control

 

 

 

 

 

or undersized frames are transferred.

1

X

1

0

1

Proper/oversize/jabber/fragment/undersized/code/

 

 

 

 

 

align/CRC data frames transferred to address

 

 

 

 

 

match channel. No control frames are transferred.

48

Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)

SPRUEQ6–December 2007

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Texas Instruments TMS320DM646x manual Promiscuous Receive Mode, Receive Frame Treatment Summary
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TMS320DM646x specifications

The Texas Instruments TMS320DM646x series is a powerful family of digital media processors designed to handle high-performance applications in video, imaging, and audio processing. These devices leverage advanced technologies to deliver efficient processing capabilities for a variety of embedded systems, making them ideal for multimedia solutions.

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