Texas Instruments TMS320DM646x manual MAC Configuration Register Macconfig

www.ti.com

Ethernet Media Access Controller (EMAC) Registers

5.33 MAC Configuration Register (MACCONFIG)

The MAC configuration register (MACCONFIG) is shown in Figure 73 and described in Table 72.

Figure 73. MAC Configuration Register (MACCONFIG)

31	24	23	16
	TXCELLDEPTH		RXCELLDEPTH
	R-18h		R-44h
15	8	7	0
	ADDRESSTYPE		MACCFIG
	R-2h		R-3h

LEGEND: R = Read only; -n= value after reset

Table 72. MAC Configuration Register (MACCONFIG) Field Descriptions

Bit	Field	Value	Description
31-24	TXCELLDEPTH	0-FFh	Transmit cell depth. Indicate the number of cells in the transmit FIFO.
23-16	RXCELLDEPTH	0-FFh	Receive cell depth. Indicate the number of cells in the receive FIFO.
15-8	ADDRESSTYPE	0-FFh	Address type.
7-0	MACCFIG	0-FFh	MAC configuration value.

5.34 Soft Reset Register (SOFTRESET)

The soft reset register (SOFTRESET) is shown in Figure 74 and described in Table 73.

Figure 74. Soft Reset Register (SOFTRESET)

31		16
Reserved
R-0
15	1	0
Reserved		SOFTRESET
R-0		R/W-0

LEGEND: R = Read only; R/W = Read/Write; -n= value after reset

Table 73. Soft Reset Register (SOFTRESET) Field Descriptions

Bit	Field	Value	Description
31-1	Reserved	0	Reserved
0	SOFTRESET		Software reset. Writing a 1 to this bit causes the EMAC logic to be reset. Software reset occurs
			when the receive and transmit DMA controllers are in an idle state to avoid locking up the
			Configuration bus. After writing a 1 to this bit, it may be polled to determine if the reset has
			occurred. If a 1 is read, the reset has not yet occurred. If a 0 is read, then a reset has occurred.
		0	A software reset has not occurred.
		1	A software reset has occurred.

SPRUEQ6–December 2007	Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)	115
Submit Documentation Feedback