www.ti.com
EMAC Control Module Registers
3.7EMAC Control Module Transmit Interrupt Enable Register (CMTXINTEN)
The transmit interrupt enable register (CMTXINTEN) is shown in Figure 19 and described in Table 16.
Figure 19. EMAC Control Module Transmit Interrupt Enable Register (CMTXINTEN)
31 |
|
| 16 |
| Reserved |
| |
|
|
| |
15 | 8 | 7 | 0 |
Reserved |
|
| TXPULSEEN |
|
|
LEGEND: R/W = Read/Write; R = Read only;
Table 16. EMAC Control Module Transmit Interrupt Enable Register (CMTXINTEN)
Field Descriptions
Bit | Field | Value | Description |
Reserved | 0 | Reserved | |
TXPULSEEN[n] |
| Transmit interrupt (TXPENDn) enable. Each bit controls the corresponding channel n transmit |
interrupt.
Bit n = 0,channel n transmit interrupt (TXPENDn) is disabled.
Bit n = 1, channel n transmit interrupt (TXPENDn) is enabled.
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) | 65 | |
Submit Documentation Feedback |
|
|