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EMAC Control Module Registers
3.12 EMAC Control Module Miscellaneous Interrupt Status Register (EWMISCSTAT)
The miscellaneous interrupt status register (EWMISCSTAT) is shown in Figure 24 and described in Table 21.
Figure 24. EMAC Control Module Miscellaneous Interrupt Status Register (CMMISCINTSTAT)
31 |
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| 16 |
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| Reserved |
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15 | 4 | 3 | 2 | 1 | 0 |
Reserved |
| STATPENDINTSTAT | HOSTPENDINTSTAT | LINKINTSTAT | USERINTSTAT |
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LEGEND: R = Read only; |
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| Table 21. EMAC Control Module Miscellaneous Interrupt Status Register (CMMISCINTSTAT) | ||
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| Field Descriptions |
Bit | Field | Value | Description |
Reserved | 0 | Reserved | |
3 | STATPENDINTSTAT |
| EMAC module statistics interrupt (STATPEND) status. |
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| 0 | EMAC module statistics interrupt (STATPEND) is not pending. |
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| 1 | EMAC module statistics interrupt (STATPEND) is pending. |
2 | HOSTPENDINTSTAT |
| EMAC module host error interrupt (HOSTPEND) status. |
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| 0 | EMAC module host error interrupt (HOSTPEND) is not pending. |
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| 1 | EMAC module host error interrupt (HOSTPEND) is pending. |
1 | LINKINTSTAT |
| MDIO module link change interrupt (LINKINT) status. |
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| 0 | MDIO module link change interrupt (LINKINT) is not pending. |
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| 1 | MDIO module link change interrupt (LINKINT) is pending. |
0 | USERINTSTAT |
| MDIO module user interrupt (USERINT) status. |
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| 0 | MDIO module user interrupt (USERINT) is not pending. |
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| 1 | MDIO module user interrupt (USERINT) is pending. |
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) | 69 | |
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