132 Using the System Setup Program
480A C6 State Disables the processor C6 state. Do at your own risk.
When you disable this option, a warning appears in
the BIOS Setup help text and a pop up message
appears when this option is changing.
480B C6 State Enables the processor C6 state. (default)
480C L3 Cache Power
Control
Disable the clock stop for an idle subcache.
480D L3 Cache Power
Control
Enable the clock stop for an idle subcache.
480E C7 State Disables the processor C7 state. Do at your own risk.
When you disable this option, a warning appears in
the BIOS Setup help text and a pop up message
appears when this option is changing.
480F C7 State Enables the processor C7 state. (default)
4810 Non Coherent
HT Link Width
Sets the HT link to 8 bit width.
4811 Non Coherent
HT Link Width
Sets the HT link to 16 bit width.
4812 Non Coherent
HT Link Speed
Sets the HT link speed to 800 MHz.
4813 Non Coherent
HT Link Speed
Sets the HT link speed to 1000 MHz.
4814 Non Coherent
HT Link Speed
Sets the HT link speed to 1200 MHz.
4815 Non Coherent
HT Link Speed
Sets the HT link speed to 1600 MHz.
4816 Non Coherent
HT Link Speed
Sets the HT link speed to 2000 MHz.
4817 Non Coherent
HT Link Speed
Sets the HT link speed to 2600 MHz.
4820 Memory Turbo
Mode
Disables memory turbo mode.
Table 2-1. D4 Token Table
(continued)
Token Setup Option Description