I2O Support

14

This chapter presents the theory of operation information about the 21555 I20 support. See Chapter 16 for specific information about I20 registers.

The 21555 implements an I2O messaging unit to allow passing of I2O messages between the host system and the local subsystem which is called IOP in I2O nomenclature.

For the host system to identify the local subsystem as an I2O compliant IOP, the class code must be preloaded to indicate I2O support:

•The Base Class is loaded with the code for intelligent I/O controllers (0Eh).

•The Sub-class Code is loaded with the code indicating I2O conformance (00h).

•The Programming Interface is loaded with (01h) to indicate 32-bit data width, 32-bit addressing, little endian, with support of the outbound post status and mask registers.

•The I2O Enable bit in the Chip Control 1 configuration register must be set to a 1 to enable the I2O message unit.

Otherwise, accesses to the I2O Inbound Queue and I2O Outbound Queue result in TRDY# and a discard of data for memory writes and TRDY#, and return of FFFFFFFFh for memory reads.

The 21555 implements two predefined I2O registers in CSR space that allow access to the I2O Inbound Queue, at offset 40h, and the I2O Outbound Queue, at offset 44h. The actual queues are located in local memory. Each queue has a Post_List FIFO and a Free_List FIFO.

•The Post_List contains I2O Message Frame Addresses (MFAs).

•The Free_List contains empty MFAs.

The 21555 implements hardware to control the FIFOs from the host side. Control of the FIFOs from the local processor side is done in software.

14.1Inbound Message Passing

An inbound message is passed from the host processor to the local processor in the following steps:

1.The host processor removes an empty MFA, if available, from the head of the Inbound Free_List.

2.The host processor posts an MFA containing the address of the message frame to the tail of the Inbound Post_List.

3.The I2O controller interrupts the local processor, indicating that an MFA exists in the Inbound Post_List.

4.The local processor retrieves the MFA from the head of the Inbound Post_List.

5.After the local processor consumes the message, it replaces the empty MFA onto the tail of the Inbound Free_List.

21555 Non-Transparent PCI-to-PCI Bridge User Manual

113

Page 112 Page 114
Page 113
Image 113
Intel 21555 user manual I2O Support, Inbound Message Passing
Page 112 Page 114

21555 specifications

The Intel 21555 is a prominent microprocessor developed by Intel, designed to cater to a variety of computing needs. This processor marks a significant step forward in Intel's lineup and underscores the company's commitment to advancing technology in personal computing, enterprise solutions, and beyond.

One of the standout features of the Intel 21555 is its advanced architecture. It utilizes a multi-core design, enabling improved performance through parallel processing. This architecture allows multiple applications to run seamlessly without a decline in speed. The cores are built on a cutting-edge manufacturing process that enhances energy efficiency while maintaining high clock speeds.

The Intel 21555 supports a wide range of technologies, including Intel Turbo Boost, which enables dynamic adjustments to the processor’s performance based on workload demands. This feature allows the processor to accelerate its speed during intensive tasks, providing users with a responsive experience when it matters the most.

Another key characteristic of the Intel 21555 is its support for integrated graphics. With Intel UHD Graphics technology, users can enjoy enhanced visuals for everyday tasks such as video playback, web browsing, and light gaming. This eliminates the need for a separate graphics card for many users, particularly in home office or light gaming scenarios.

Security is a significant focus in the design of the Intel 21555. It includes built-in hardware-based security features like Intel Trusted Execution Technology and Secure Boot. These features help protect against various types of threats, ensuring that user data remains secure from malicious attacks.

The Intel 21555 is also optimized for use with Intel's platform technologies, including Intel Optane memory and Intel Rapid Storage Technology. These technologies work together to deliver faster boot times and improved system responsiveness, making computing more efficient for users.

Furthermore, the Intel 21555 is designed to support virtualization technologies, allowing multiple operating systems to run concurrently without compromising performance. This is particularly useful for developers and businesses that rely on virtualization for testing and development environments.

In summary, the Intel 21555 is a powerful and versatile processor that reflects Intel's ongoing innovation in the computing space. With its multi-core architecture, enhanced graphics capabilities, strong security features, and advanced technologies, it stands out as an excellent choice for a wide range of applications, serving both casual users and professionals alike.
Top Page Image Contents