Interrupt and Scratchpad Registers, Interrupt Support

Interrupt and Scratchpad Registers 11

This chapter presents the theory of operation information about the 21555 interrupt handling and about the 32-bit scratchpad registers. See Chapter 16 for specific information about these registers.

11.1Primary and Secondary PCI Bus Interrupt Signals

Table 26 describes the primary and secondary PCI bus interrupt signals.

Table 26. Primary and Secondary PCI Bus Interrupt Signals

Signal Name	Type	Description

		Primary PCI bus interrupt. Signal p_inta_l is asserted by the 21555 when:
		A primary doorbell register bit is set.
p_inta_l		The I20 outbound queue is not empty.
p_inta_l	OD	The subsystem event bit is set.
		The subsystem event bit is set.
		All of these conditions are individually maskable. When the corresponding event bit is
		cleared or the I20 outbound queue is emptied, p_inta_l is deasserted. Signal p_inta_l
		is pulled up through an external resistor.

		Secondary PCI bus interrupt. Signal s_inta_l is asserted by the 21555 when:
		A secondary doorbell register bit is set.
		The I20 inbound queue is not empty.
s_inta_l	OD	A page boundary is reached when performing lookup table address translation.
s_inta_l	OD	The 21555 transitions from a D1 or D2 power state to a D0 power state.

		All of these conditions are individually maskable. Signal s_inta_l is deasserted when
		the corresponding event bit is cleared, or when the I20 inbound queue is empty.
		Signal s_inta_l is pulled up through an external resistor.

11.2Interrupt Support

The 21555 supports hardware to facilitate software-generated interrupts, as well as interrupts initiated by the 21555 activity. The 21555 has interrupt request status and interrupt mask bits for the following conditions:

•I20 Inbound Post_List FIFO not empty.

—Cleared automatically when FIFO is empty.

—Asserts s_inta_l when the corresponding mask bit is zero.

•I20 Outbound Post_List FIFO not empty.

—Cleared automatically when FIFO is empty.

—Asserts p_inta_l when the corresponding mask bit is zero.

•Upstream memory read or write Dword transfer in Upstream Memory Range 2 addresses the last Dword in a page.

—One event and enable bit for each of the 64 pages in Upstream Memory Range 2.

21555 Non-Transparent PCI-to-PCI Bridge User Manual

101

21555 specifications

The Intel 21555 is a prominent microprocessor developed by Intel, designed to cater to a variety of computing needs. This processor marks a significant step forward in Intel's lineup and underscores the company's commitment to advancing technology in personal computing, enterprise solutions, and beyond.

One of the standout features of the Intel 21555 is its advanced architecture. It utilizes a multi-core design, enabling improved performance through parallel processing. This architecture allows multiple applications to run seamlessly without a decline in speed. The cores are built on a cutting-edge manufacturing process that enhances energy efficiency while maintaining high clock speeds.

The Intel 21555 supports a wide range of technologies, including Intel Turbo Boost, which enables dynamic adjustments to the processor’s performance based on workload demands. This feature allows the processor to accelerate its speed during intensive tasks, providing users with a responsive experience when it matters the most.

Another key characteristic of the Intel 21555 is its support for integrated graphics. With Intel UHD Graphics technology, users can enjoy enhanced visuals for everyday tasks such as video playback, web browsing, and light gaming. This eliminates the need for a separate graphics card for many users, particularly in home office or light gaming scenarios.

Security is a significant focus in the design of the Intel 21555. It includes built-in hardware-based security features like Intel Trusted Execution Technology and Secure Boot. These features help protect against various types of threats, ensuring that user data remains secure from malicious attacks.

The Intel 21555 is also optimized for use with Intel's platform technologies, including Intel Optane memory and Intel Rapid Storage Technology. These technologies work together to deliver faster boot times and improved system responsiveness, making computing more efficient for users.

Furthermore, the Intel 21555 is designed to support virtualization technologies, allowing multiple operating systems to run concurrently without compromising performance. This is particularly useful for developers and businesses that rely on virtualization for testing and development environments.

In summary, the Intel 21555 is a powerful and versatile processor that reflects Intel's ongoing innovation in the computing space. With its multi-core architecture, enhanced graphics capabilities, strong security features, and advanced technologies, it stands out as an excellent choice for a wide range of applications, serving both casual users and professionals alike.

Intel 21555 Interrupt and Scratchpad Registers, Primary and Secondary PCI Bus Interrupt Signals

Models: 21555