List of Registers

List of Registers

16

 

 

This chapter contains reference information about all of the 21555 registers. Table 31 is a cross reference between the sections in this chapter to there accompanying theory of operation chapters.

Table 31. Register Cross Reference Table

Theory of Operation Chapter

Register Reference Information.

 

 

Chapter 4, “Address Decoding”

Section 16.4, “Address Decoding” on page 130

 

 

Chapter 3, “Signal Descriptions”

Section 16.5, “PCI Registers” on page 147

Chapter 5, “PCI Bus Transactions”

 

 

 

Chapter 6, “Initialization Requirements”

Section 16.13, “Init Registers” on page 185

 

 

Chapter 11, “Interrupt and Scratchpad Registers”

Section 16.7, “Interrupt Registers” on page 170

Section 16.8, “Scratchpad Registers” on page 174

 

 

 

Chapter 8, “Parallel ROM Interface”

Section 16.9, “PROM Registers” on page 175

 

 

Chapter 9, “Serial ROM Interface”

Section 16.10, “SROM Registers” on page 179

 

 

Chapter 10, “Arbitration”

Section 16.11, “Arbiter Control” on page 183

 

 

Chapter 12, “Error Handling”

Section 16.12, “Error Registers” on page 183

 

 

Chapter 13, “JTAG Test Port”

Section 16.14, “JTAG Registers” on page 190

 

 

Chapter 14, “I2O Support”

Section 16.6, “I2O Registers” on page 165

 

 

Chapter 15, “VPD Support”

Section 16.15, “VPD Registers” on page 192

 

 

16.1Register Summary

This chapter lists the 21555 configuration space registers and the CSR address map registers. A description of the notes used in the tables used in this chapter are listed as follows:

Byte offsets that are specific to the primary or secondary interfaces are followed by a (P) or (S) respectively. All other byte offsets refer to both the primary and secondary address spaces. The configuration registers are listed in order of primary byte offset.

For read and write access, the following apply:

Y: accessible from both primary and secondary interface.

N: not accessible from either interface.

Primary: for writes, only write from primary interface; for reads, reads as 0 from secondary interface.

Secondary: for writes, only write from secondary interface; for reads, reads as 0 from primary interface.

Special cases (for example, W1TC, W1TS, and R0TS) are noted.

Some registers contain fields or bits with different access types (for example, R, R/W, W1TC) which are not detailed in this table. See the individual register description for detailed information.

Not all bits in every register denoted as preloadable are necessarily preloaded. See the individual register description for detailed information.

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Intel 21555 user manual List of Registers, Register Summary, Register Cross Reference Table

21555 specifications

The Intel 21555 is a prominent microprocessor developed by Intel, designed to cater to a variety of computing needs. This processor marks a significant step forward in Intel's lineup and underscores the company's commitment to advancing technology in personal computing, enterprise solutions, and beyond.

One of the standout features of the Intel 21555 is its advanced architecture. It utilizes a multi-core design, enabling improved performance through parallel processing. This architecture allows multiple applications to run seamlessly without a decline in speed. The cores are built on a cutting-edge manufacturing process that enhances energy efficiency while maintaining high clock speeds.

The Intel 21555 supports a wide range of technologies, including Intel Turbo Boost, which enables dynamic adjustments to the processor’s performance based on workload demands. This feature allows the processor to accelerate its speed during intensive tasks, providing users with a responsive experience when it matters the most.

Another key characteristic of the Intel 21555 is its support for integrated graphics. With Intel UHD Graphics technology, users can enjoy enhanced visuals for everyday tasks such as video playback, web browsing, and light gaming. This eliminates the need for a separate graphics card for many users, particularly in home office or light gaming scenarios.

Security is a significant focus in the design of the Intel 21555. It includes built-in hardware-based security features like Intel Trusted Execution Technology and Secure Boot. These features help protect against various types of threats, ensuring that user data remains secure from malicious attacks.

The Intel 21555 is also optimized for use with Intel's platform technologies, including Intel Optane memory and Intel Rapid Storage Technology. These technologies work together to deliver faster boot times and improved system responsiveness, making computing more efficient for users.

Furthermore, the Intel 21555 is designed to support virtualization technologies, allowing multiple operating systems to run concurrently without compromising performance. This is particularly useful for developers and businesses that rely on virtualization for testing and development environments.

In summary, the Intel 21555 is a powerful and versatile processor that reflects Intel's ongoing innovation in the computing space. With its multi-core architecture, enhanced graphics capabilities, strong security features, and advanced technologies, it stands out as an excellent choice for a wide range of applications, serving both casual users and professionals alike.