Address Decoding

Note: The lookup table is not cleared by reset. The lookup table must be initialized by the local processor before the Upstream Memory 2 Address range is used.

Figure 9. Lookup Table Entry Format

31

18 17

8

7

4

3

2

1

0

 

Translated Base Address

 

Translated Base Address

Reserved

 

 

 

 

 

 

or Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Prefetchable

Reserved

Reserved

Valid

A7467-01

4.3.5Forwarding of 64-Bit Address Memory Transactions

The 21555 considers the host and local memory space above the 4 GB boundary to be shared. This means that the 21555 uses a flat address map in this space. Dual-address cycle (DAC) transactions are used for addressing above the 4 GB boundary. The 21555 can forward dual-address cycle transactions both upstream and downstream. The Downstream Memory 3 BAR is used to designate the address range for downstream DACs. Inverse decoding is used for upstream DACs.

The Downstream Memory 3 BAR may be configured to be a 64-bit BAR by preloading the Downstream Memory 3 Upper 32 Bits Setup register bit [31] to a one. The Downstream Memory 3 Setup register bits [2:1] should be set to 10b. This implies that the memory range can be located anywhere in 64-bit address space. When this 64-bit addressing option is used, the maximum window size changes from 2 GB (in the 32-bit case) to 263 bytes.

When the preloaded window size for a 64-bit BAR is 2 GB or less, the space requested may be mapped either in 32-bit address space or 64-bit address space. In the former case, the upper 32 bits of the base address is zero and transactions are forwarded as described in the previous section using direct offset address translation. When the upper 32-bit base address is non-zero, the memory range is located above the 4 GB boundary.

When the Downstream Memory 3 Range is mapped above the 4 GB boundary, primary bus transactions falling into this address range are forwarded downstream with no address translation performed. Any 64-bit address transactions on the secondary bus falling outside of the Downstream Memory 3 address range are forwarded upstream, again with no address translation. This is similar to the forwarding mechanisms of a transparent PPB (21154) and is illustrated in Figure 10.

Note: Since the use of BARs restricts the alignment of the address range to the window size, the Downstream Memory 3 address range can never straddle the 4 GB boundary. The base address of

21555 Non-Transparent PCI-to-PCI Bridge User Manual

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Intel 21555 user manual Forwarding of 64-Bit Address Memory Transactions, Lookup Table Entry Format

21555 specifications

The Intel 21555 is a prominent microprocessor developed by Intel, designed to cater to a variety of computing needs. This processor marks a significant step forward in Intel's lineup and underscores the company's commitment to advancing technology in personal computing, enterprise solutions, and beyond.

One of the standout features of the Intel 21555 is its advanced architecture. It utilizes a multi-core design, enabling improved performance through parallel processing. This architecture allows multiple applications to run seamlessly without a decline in speed. The cores are built on a cutting-edge manufacturing process that enhances energy efficiency while maintaining high clock speeds.

The Intel 21555 supports a wide range of technologies, including Intel Turbo Boost, which enables dynamic adjustments to the processor’s performance based on workload demands. This feature allows the processor to accelerate its speed during intensive tasks, providing users with a responsive experience when it matters the most.

Another key characteristic of the Intel 21555 is its support for integrated graphics. With Intel UHD Graphics technology, users can enjoy enhanced visuals for everyday tasks such as video playback, web browsing, and light gaming. This eliminates the need for a separate graphics card for many users, particularly in home office or light gaming scenarios.

Security is a significant focus in the design of the Intel 21555. It includes built-in hardware-based security features like Intel Trusted Execution Technology and Secure Boot. These features help protect against various types of threats, ensuring that user data remains secure from malicious attacks.

The Intel 21555 is also optimized for use with Intel's platform technologies, including Intel Optane memory and Intel Rapid Storage Technology. These technologies work together to deliver faster boot times and improved system responsiveness, making computing more efficient for users.

Furthermore, the Intel 21555 is designed to support virtualization technologies, allowing multiple operating systems to run concurrently without compromising performance. This is particularly useful for developers and businesses that rely on virtualization for testing and development environments.

In summary, the Intel 21555 is a powerful and versatile processor that reflects Intel's ongoing innovation in the computing space. With its multi-core architecture, enhanced graphics capabilities, strong security features, and advanced technologies, it stands out as an excellent choice for a wide range of applications, serving both casual users and professionals alike.