I/O Port Address
The
Address | Chip in Use |
Master 8259 programming interface | |
Configuration | |
8254 programming interface | |
60 | Keyboard & mouse |
61 | NMI status register |
64 | Keyboard & mouse |
NMI enable | |
Slave 8259 programming interface | |
DMA controller page register | |
Base address register | |
F0 | Register IRQ13 |
Logical device configuration | |
(Parallel port 3) | |
Serial port 2 | |
BAR or 376 | |
(Floppy disk drive 2), IDE 2 | |
(Parallel port 2) | |
VGA | |
Parallel port 1 | |
VGA | |
3F6 or BAR1 | |
(Floppy disk drive 1), IDE 1 | |
Serial port A | |
40B | DMA1 expansion write mode register |
4D0 | Master 8259 ELCR programming |
4D1 | Slave 8259 ELCR programming |
4D6 | DMA2 expansion write mode register |
SMBus control | |
C00 | PCI IRQ mapping index register |
C01 | PCI IRQ mapping data register |
C14 | PCI error status register |
C49 | Address & status control |
C4A | Rise time counter control |
C52 | General register (GPMs) |
C6C | ISA wait register |
C6F | Other control registers |
IPMI (IMPI KCS interface) | |
IPMI (SMI interface) | |
IPMI (SCI/SW1 interface) | |
CD6 | Power management index register |
CD7 | Power management data register |
CF8, CFC | PCI configuration space |
CF9 | Reset control |
General chipset | |
EDMA2 PCI base address register 4 |
*Expressed in hexadecimal digits.
*I/O port addresses of PCI devices are specified based on the type and number of PCI devices.