Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.2.1.4FIFO Level Interrupt Register (FIFO_INT)Offset: | 068h | Size: | 32 bits |
This read/write register configures the limits where the RX/TX Data and Status FIFO’s will generate system interrupts.
BITS | DESCRIPTION | TYPE | DEFAULT |
|
|
|
|
31:24 | TX Data Available Level | R/W | 48h |
| The value in this field sets the level, in number of 64 Byte blocks, at which |
|
|
| the TX Data FIFO Available Interrupt (TDFA) will be generated. When the |
|
|
| TX Data FIFO free space is greater than this value, a TX Data FIFO |
|
|
| Available Interrupt (TDFA) will be generated in the Interrupt Status Register |
|
|
|
|
| |
|
|
|
|
23:16 | TX Status Level | R/W | 00h |
| The value in this field sets the level, in number of DWORD’s, at which the |
|
|
| TX Status FIFO Level Interrupt (TSFL) will be generated. When the TX |
|
|
| Status FIFO used space is greater than this value, a TX Status FIFO Level |
|
|
| Interrupt (TSFL) will be generated in the Interrupt Status Register |
|
|
|
|
| |
|
|
|
|
15:8 | RESERVED - This field must be written with 00h for proper operation. | R/W | 00h |
|
|
|
|
7:0 | RX Status Level | R/W | 00h |
| The value in this field sets the level, in number of DWORD’s, at which the |
|
|
| RX Status FIFO Level Interrupt (RSFL) will be generated. When the RX |
|
|
| Status FIFO used space is greater than this value, a RX Status FIFO Level |
|
|
| Interrupt (RSFL) will be generated in the Interrupt Status Register |
|
|
|
|
| |
|
|
|
|
Revision 1.4 | 180 | SMSC LAN9311/LAN9311i |
| DATASHEET |
|