Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

14.5.4.18Buffer Manager Port 2 Egress Rate Priority Queue 0/1 Register (BM_EGRSS_RATE_20_21)

Register #:

1C11h

Size:

32 bits

This register, along with the Buffer Manager Configuration Register (BM_CFG), is used to configure the egress rate pacing.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:26

RESERVED

RO

-

 

 

 

 

25:13

Egress Rate Port 2 Priority Queue 1

R/W

00000h

 

These bits specify the egress data rate for the Port 2 priority queue 1. The

 

 

 

rate is specified in time per byte. The time is this value plus 1 times 20nS.

 

 

 

 

 

 

12:0

Egress Rate Port 2 Priority Queue 0

R/W

00000h

 

These bits specify the egress data rate for the Port 2 priority queue 0. The

 

 

 

rate is specified in time per byte. The time is this value plus 1 times 20nS.

 

 

 

 

 

 

SMSC LAN9311/LAN9311i

431

Revision 1.4 (08-19-08)

 

DATASHEET