Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

14.2.8.2Virtual PHY Basic Status Register (VPHY_BASIC_STATUS)

Offset:

1C4h

Size:

32 bits

Index (decimal):

1

 

 

This register is used to monitor the status of the Virtual PHY.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:16

RESERVED

RO

-

 

(See Note 14.17)

 

 

 

 

 

 

15

100BASE-T4

RO

0b

 

This bit displays the status of 100BASE-T4 compatibility.

 

Note 14.18

 

0: PHY not able to perform 100BASE-T4

 

 

 

1: PHY able to perform 100BASE-T4

 

 

 

 

 

 

14

100BASE-X Full Duplex

RO

1b

 

This bit displays the status of 100BASE-X full duplex compatibility.

 

 

 

0: PHY not able to perform 100BASE-X full duplex

 

 

 

1: PHY able to perform 100BASE-X full duplex

 

 

 

 

 

 

13

100BASE-X Half Duplex

RO

1b

 

This bit displays the status of 100BASE-X half duplex compatibility.

 

 

 

0: PHY not able to perform 100BASE-X half duplex

 

 

 

1: PHY able to perform 100BASE-X half duplex

 

 

 

 

 

 

12

10BASE-T Full Duplex

RO

1b

 

This bit displays the status of 10BASE-T full duplex compatibility.

 

 

 

0: PHY not able to perform 10BASE-T full duplex

 

 

 

1: PHY able to perform 10BASE-T full duplex

 

 

 

 

 

 

11

10BASE-T Half Duplex

RO

1b

 

This bit displays the status of 10BASE-T half duplex compatibility.

 

 

 

0: PHY not able to perform 10BASE-T half duplex

 

 

 

1: PHY able to perform 10BASE-T half duplex

 

 

 

 

 

 

10

100BASE-T2 Full Duplex

RO

0b

 

This bit displays the status of 100BASE-T2 full duplex compatibility.

 

Note 14.18

 

0: PHY not able to perform 100BASE-T2 full duplex

 

 

 

1: PHY able to perform 100BASE-T2 full duplex

 

 

 

 

 

 

9

100BASE-T2 Half Duplex

RO

0b

 

This bit displays the status of 100BASE-T2 half duplex compatibility.

 

Note 14.18

 

0: PHY not able to perform 100BASE-T2 half duplex

 

 

 

1: PHY able to perform 100BASE-T2 half duplex

 

 

 

 

 

 

8

Extended Status

RO

0b

 

This bit displays whether extended status information is in register 15 (per

 

Note 14.19

 

IEEE 802.3 clause 22.2.4).

 

 

 

0: No extended status information in Register 15

 

 

 

1: Extended status information in Register 15

 

 

 

 

 

 

7

RESERVED

RO

-

 

 

 

 

SMSC LAN9311/LAN9311i

249

Revision 1.4 (08-19-08)

 

DATASHEET