Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

14.5.4.27Buffer Manager Interrupt Pending Register (BM_IPR)

Register #:

1C21h

Size:

32 bits

This register contains the Buffer Manager interrupt status. The status is double buffered. All interrupts in this register may be masked via the Buffer Manager Interrupt Mask Register (BM_IMR) register. Refer to Chapter 5, "System Interrupts," on page 49 for more information.

BITS

DESCRIPTION

TYPE

DEFAULT

31:14

RESERVED

 

RO

-

 

 

 

 

 

 

13:10

Drop Reason B

RC

0h

 

When bit 7 is set, these bits indicate the reason a packet was dropped per

 

 

 

the table below:

 

 

 

 

 

 

 

 

 

 

 

BIT

 

DESCRIPTION

 

 

 

 

VALUES

 

 

 

 

 

 

 

 

 

 

 

 

0000

 

The destination address was not in the ALR table (unknown or broadcast), and

 

 

 

 

 

 

the Broadcast Buffer Level was exceeded.

 

 

 

 

 

 

 

 

 

 

 

0001

 

Drop on Red was set and the packet was colored Red.

 

 

 

 

 

 

 

 

 

 

 

0010

 

There were no buffers available.

 

 

 

 

 

 

 

 

 

 

 

0011

 

There were no memory descriptors available.

 

 

 

 

 

 

 

 

 

 

 

0100

 

The destination address was not in the ALR table (unknown or broadcast) and

 

 

 

 

 

 

there were no valid destination ports.

 

 

 

 

 

 

 

 

 

 

 

0101

 

The packet had a receive error and was >64 bytes

 

 

 

 

 

 

 

 

 

 

 

0110

 

The Buffer Drop Level was exceeded.

 

 

 

 

 

 

 

 

 

 

 

0111

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1000

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1001

 

Drop on Yellow was set, the packet was colored Yellow and was randomly

 

 

 

 

 

 

selected to be dropped.

 

 

 

 

 

 

 

 

 

 

 

1010

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1011

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1100

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1101

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1110

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

1111

 

RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9:8

Source Port B

RC

00b

 

When bit 7 is set, these bits indicate the source port on which the packet

 

 

 

was dropped.

 

 

 

00 = Port 0

 

 

 

 

01 = Port 1

 

 

 

 

10 = Port 2

 

 

 

 

11 = RESERVED

 

 

 

 

 

 

 

 

7

Status B Pending

RC

0b

 

When set, bits 13:8 are valid.

 

 

Revision 1.4 (08-19-08)

440

SMSC LAN9311/LAN9311i

 

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