Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

15.5.2Reset and Configuration Strap Timing

This diagram illustrates the nRST pin timing requirements and its relation to the configuration strap pins and output drive. Assertion of nRST is not a requirement. However, if used, it must be asserted for the minimum period specified. Please refer to Section 4.2, "Resets," on page 36 for additional information.

trstia

nRST

tcsstcsh

Configuration

Strap Pins

todad

Output Drive

Figure 15.2 nRST Reset Pin Timing

Table 15.6 nRST Reset Pin Timing Values

SYMBOL

DESCRIPTION

MIN

TYP

MAX

UNITS

 

 

 

 

 

 

trstia

nRST input assertion time

200

 

 

μS

tcss

Configuration strap pins setup to nRST deassertion

200

 

 

nS

tcsh

Configuration strap pins hold after nRST deassertion

10

 

 

nS

todad

Output drive after deassertion

30

 

 

nS

Note: Device configuration straps are latched as a result of nRST assertion. Refer to Section 4.2.4, "Configuration Straps," on page 40 for details.

Revision 1.4 (08-19-08)

446

SMSC LAN9311/LAN9311i

 

DATASHEET