SMSC LAN9311, LAN9311i 15.5.3Power-OnConfiguration Strap Valid Timing

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

15.5.3Power-On Configuration Strap Valid Timing

This diagram illustrates the configuration strap valid timing requirements in relation to power-on. In order for valid configuration strap values to be read at power-on, the following timing requirements must be met.

VDD33IO2.0V

tcfg

Configuration Straps

Figure 15.3 Power-On Configuration Strap Latching Timing

Table 15.7 Power-On Configuration Strap Latching Timing Values

SYMBOL	DESCRIPTION	MIN	TYP	MAX	UNITS
tcfg	Configuration strap valid time			15	mS

Note: Configuration straps must only be pulled high or low. Configuration straps must not be driven as inputs.

Note: Device configuration straps are also latched as a result of nRST assertion. Refer to Section 15.5.2, "Reset and Configuration Strap Timing," on page 446 and Section 4.2.4, "Configuration Straps," on page 40 for additional details.

SMSC LAN9311/LAN9311i	447	Revision 1.4 (08-19-08)
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