Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

Table 14.3 Switch Fabric CSR to SWITCH_CSR_DIRECT_DATA Address Range Map (continued)

 

SWITCH FABRIC CSR

SWITCH_CSR_DIRECT_DATA

REGISTER NAME

REGISTER #

ADDRESS

 

 

 

MAC_TX_CFG_2

0C40h

22Ch

 

 

 

MAC_TX_FC_SETTINGS_2

0C41h

230h

 

 

 

MAC_IMR_2

0C80h

234h

 

 

 

 

Switch Engine CSRs

 

 

 

 

SWE_ALR_CMD

1800h

238h

 

 

 

SWE_ALR_WR_DAT_0

1801h

23Ch

 

 

 

SWE_ALR_WR_DAT_1

1802h

240h

 

 

 

SWE_ALR_CFG

1809h

244h

 

 

 

SWE_VLAN_CMD

180Bh

248h

 

 

 

SWE_VLAN_WR_DATA

180Ch

24Ch

 

 

 

SWE_DIFFSERV_TBL_CMD

1811h

250h

 

 

 

SWE_DIFFSERV_TBL_WR_DATA

1812h

254h

 

 

 

SWE_GLB_INGRESS_CFG

1840h

258h

 

 

 

SWE_PORT_INGRESS_CFG

1841h

25Ch

 

 

 

SWE_ADMT_ONLY_VLAN

1842h

260h

 

 

 

SWE_PORT_STATE

1843h

264h

 

 

 

SWE_PRI_TO_QUE

1845h

268h

 

 

 

SWE_PORT_MIRROR

1846h

26Ch

 

 

 

SWE_INGRESS_PORT_TYP

1847h

270h

 

 

 

SWE_BCST_THROT

1848h

274h

 

 

 

SWE_ADMT_N_MEMBER

1849h

278h

 

 

 

SWE_INGRESS_RATE_CFG

184Ah

27Ch

 

 

 

SWE_INGRESS_RATE_CMD

184Bh

280h

 

 

 

SWE_INGRESS_RATE_WR_DATA

184Dh

284h

 

 

 

SWE_INGRESS_REGEN_TBL_MII

1855h

288h

 

 

 

SWE_INGRESS_REGEN_TBL_1

1856h

28Ch

 

 

 

SWE_INGRESS_REGEN_TBL_2

1857h

290h

 

 

 

SWE_IMR

1880h

294h

 

 

 

 

Buffer Manager (BM) CSRs

 

 

 

 

BM_CFG

1C00h

298h

 

 

 

BM_DROP_LVL

1C01h

29Ch

 

 

 

BM_FC_PAUSE_LVL

1C02h

2A0h

 

 

 

Revision 1.4 (08-19-08)

242

SMSC LAN9311/LAN9311i

 

DATASHEET