Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

14.4.2.4Port x PHY Identification LSB Register (PHY_ID_LSB_x)

Index (decimal): 3

Size:

16 bits

This read/write register contains the LSB of the Organizationally Unique Identifier (OUI) for the Port x PHY. The MSB of the PHY OUI is contained in the Port x PHY Identification MSB Register (PHY_ID_MSB_x).

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

15:10

PHY ID

R/W

30h

 

This field is assigned to the 19th through 24th bits of the PHY OUI,

 

 

 

respectively. (OUI = 00800Fh).

 

 

 

 

 

 

9:4

Model Number

R/W

0Dh

 

This field contains the 6-bit manufacturer’s model number of the PHY.

 

 

 

 

 

 

3:0

Revision Number

R/W

1h

 

This field contain the 4-bit manufacturer’s revision number of the PHY.

 

 

 

 

 

 

Revision 1.4 (08-19-08)

294

SMSC LAN9311/LAN9311i

 

DATASHEET